Mario Lodde

According to our database, Mario Lodde authored at least 9 papers between 2012 and 2015.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2015

Area-efficient snoopy-aware NoC design for high-performance chip multiprocessor systems.

Antoni Roca, Carles Hernández, Mario Lodde, José Flich

Comput. Electr. Eng., 2015

2014

Runtime home mapping for effective memory resource usage.

Mario Lodde, José Flich

Microprocess. Microsystems, 2014

2013

Built-in fast gather control network for efficient support of coherence protocols.

Mario Lodde, Antoni Roca, José Flich

IET Comput. Digit. Tech., 2013

An NoC and cache hierarchy substrate to address effective virtualization and fault-tolerance.

Mario Lodde, José Flich

Proceedings of the 2013 Seventh IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 2013

Towards Efficient Dynamic LLC Home Bank Mapping with NoC-Level Support.

Mario Lodde, José Flich, Manuel E. Acacio

Proceedings of the Euro-Par 2013 Parallel Processing, 2013

A Lightweight Network of IDs to Quickly Deliver Simple Control Messages.

Mario Lodde, José Flich

Proceedings of the Euro-Par 2013: Parallel Processing Workshops, 2013

2012

Heterogeneous NoC Design for Efficient Broadcast-based Coherence Protocol Support.

Mario Lodde, José Flich, Manuel E. Acacio

Proceedings of the 2012 Sixth IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 2012

Heterogeneous network design for effective support of invalidation-based coherency protocols.

Mario Lodde, Toni Roca, José Flich

Proceedings of the 2012 Interconnection Network Architecture, 2012

Dynamic Last-Level Cache Allocation to Reduce Area and Power Overhead in Directory Coherence Protocols.

Mario Lodde, José Flich, Manuel E. Acacio

Proceedings of the Euro-Par 2012 Parallel Processing - 18th International Conference, 2012