Mario Carpentieri
Orcid: 0000-0001-5165-5873
According to our database1,
Mario Carpentieri
authored at least 16 papers
between 2003 and 2024.
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Bibliography
2024
A design of magnetic tunnel junctions for the deployment of neuromorphic hardware for edge computing.
CoRR, 2024
2023
A Low-Energy DMTJ-Based Ternary Content- Addressable Memory With Reliable Sub-Nanosecond Search Operation.
IEEE Access, 2023
2021
2020
Assessment of STT-MRAMs based on double-barrier MTJs for cache applications by means of a device-to-system level simulation framework.
Integr., 2020
2019
Automatic crack detection and classification by exploiting statistical event descriptors for Deep Learning.
CoRR, 2019
Proceedings of the 16th International Conference on Synthesis, 2019
2018
A Variation-Aware Timing Modeling Approach for Write Operation in Hybrid CMOS/STT-MTJ Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
2017
Impact of voltage scaling on STT-MRAMs through a variability-aware simulation framework.
Proceedings of the 14th International Conference on Synthesis, 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
2016
Proceedings of the 2nd IEEE International Forum on Research and Technologies for Society and Industry Leveraging a better tomorrow, 2016
2015
Magnetic solitons driven by spin-based phenomena: A review on their features and potentialities.
Proceedings of the 1st IEEE International Forum on Research and Technologies for Society and Industry Leveraging a better tomorrow, 2015
Proceedings of the 1st IEEE International Forum on Research and Technologies for Society and Industry Leveraging a better tomorrow, 2015
2004
Proceedings of the Biological and Artificial Intelligence Environments, 2004
Proceedings of the IEEE International Joint Conference on Neural Networks, 2004
2003
Proceedings of the Neural Nets, 14th Italian Workshop on Neural Nets, 2003