Mario Caresosa

According to our database1, Mario Caresosa authored at least 5 papers between 2001 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2022
An 182mW 1-60Gb/s Configurable PAM-4/NRZ Transceiver for Large Scale ASIC Integration in 7nm FinFET Technology.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2011
A digital wideband CDR with ±15.6kppm frequency tracking at 8Gb/s in 40nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2007
A Fully Integrated 10-Gb/s Receiver With Adaptive Optical Dispersion Equalizer in 0.13-µm CMOS.
IEEE J. Solid State Circuits, 2007

2002
OC-192 transmitter and receiver in standard 0.18-μm CMOS.
IEEE J. Solid State Circuits, 2002

2001
A fully integrated SONET OC-48 transceiver in standard CMOS.
IEEE J. Solid State Circuits, 2001


  Loading...