Maria V. Valueva

Orcid: 0000-0002-4732-3216

According to our database1, Maria V. Valueva authored at least 15 papers between 2018 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Residue number systems with six modules and efficient circuits based on power-of-two diagonal modulus.
Comput. Electr. Eng., September, 2023

Digital Filter Architecture Based on Modified Winograd Method F(2× 2, 5× 5) and Residue Number System.
IEEE Access, 2023

2022
High Performance Parallel Pseudorandom Number Generator on Cellular Automata.
Symmetry, 2022

Method for Convolutional Neural Network Hardware Implementation Based on a Residue Number System.
Program. Comput. Softw., 2022

RNS-Based FPGA Accelerators for High-Quality 3D Medical Image Wavelet Processing Using Scaled Filter Coefficients.
IEEE Access, 2022

2021
Digital Filter Architecture With Calculations in the Residue Number System by Winograd Method F (2 × 2, 2 × 2).
IEEE Access, 2021

Single Image Super-Resolution Method Based on Bilinear Interpolation and U-Net Combination.
Proceedings of the 10th Mediterranean Conference on Embedded Computing, 2021

A New Method of Sign Detection in RNS Based on Modified Chinese Remainder Theorem.
Proceedings of the 10th Mediterranean Conference on Embedded Computing, 2021

2020
Application of the residue number system to reduce hardware costs of the convolutional neural network implementation.
Math. Comput. Simul., 2020

Residue Number System-Based Solution for Reducing the Hardware Cost of a Convolutional Neural Network.
Neurocomputing, 2020

High-Performance Digital Filtering on Truncated Multiply-Accumulate Units in the Residue Number System.
IEEE Access, 2020

Classification of Moduli Sets for Residue Number System With Special Diagonal Functions.
IEEE Access, 2020

High-Performance Hardware 3D Medical Imaging using Wavelets in the Residue Number System.
Proceedings of the 9th Mediterranean Conference on Embedded Computing, 2020

2019
Hardware Implementation of Video Processing Device using Residue Number System.
Proceedings of the 42nd International Conference on Telecommunications and Signal Processing, 2019

2018
Area-Efficient FPGA Implementation of Minimalistic Convolutional Neural Network Using Residue Number System.
Proceedings of the 23rd Conference of Open Innovations Association, 2018


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