María Engracia Gómez

Alberto Ros

Proceedings of the 23rd IEEE International Conference on High Performance Computing, 2016

Student Research Poster: A Low Complexity Cache Sharing Mechanism to Address System Fairness.

[BibT_eX]

[DOI]

Proceedings of the 2016 International Conference on Parallel Architectures and Compilation, 2016

2015

PS directory: a scalable multilevel directory cache for CMPs.

[BibT_eX]

[DOI]

J. Supercomput., 2015

PS-Cache: an energy-efficient cache design for chip multiprocessors.

[BibT_eX]

[DOI]

J. Supercomput., 2015

A HoL-blocking aware mechanism for selecting the upward path in fat-tree topologies.

[BibT_eX]

[DOI]

J. Supercomput., 2015

Bringing real processors to labs.

[BibT_eX]

[DOI]

Comput. Appl. Eng. Educ., 2015

The Tag Filter Cache: An Energy-Efficient Approach.

[BibT_eX]

[DOI]

Proceedings of the 23rd Euromicro International Conference on Parallel, 2015

Methodologies and Performance Metrics to Evaluate Multiprogram Workloads.

[BibT_eX]

[DOI]

Vicent Selfa

Proceedings of the 23rd Euromicro International Conference on Parallel, 2015

XORAdap: A HoL-Blocking Aware Adaptive Routing Algorithm.

[BibT_eX]

[DOI]

Proceedings of the 23rd Euromicro International Conference on Parallel, 2015

Row Tables: Design Choices to Exploit Bank Locality in Multiprogram Workloads.

[BibT_eX]

[DOI]

Proceedings of the 23rd Euromicro International Conference on Parallel, 2015

A Research-Oriented Course on Advanced Multicore Architecture.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015

Speeding-up the fault-tolerance analysis of interconnection networks.

[BibT_eX]

[DOI]

Diego F. Bermúdez Garzón

Proceedings of the 2015 International Conference on High Performance Computing & Simulation, 2015

2014

FT-RUFT: A Performance and Fault-Tolerant Efficient Indirect Topology.

[BibT_eX]

[DOI]

Diego F. Bermúdez Garzón

Roberto Peñaranda Cebrian

Proceedings of the 22nd Euromicro International Conference on Parallel, 2014

HoL-Blocking Avoidance Routing Algorithms in Direct Topologies.

[BibT_eX]

[DOI]

María Engracia Gómez Requena

José Duato Marín

Proceedings of the 2014 IEEE International Conference on High Performance Computing and Communications, 2014

2013

Increasing the Effectiveness of Directory Caches by Avoiding the Tracking of Noncoherent Memory Blocks.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2013

A New Methodology for Studying Realistic Processors in Computer Science Degrees.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

Temporal-Aware Mechanism to Detect Private Data in Chip Multiprocessors.

[BibT_eX]

[DOI]

Proceedings of the 42nd International Conference on Parallel Processing, 2013

Deterministic Routing with HoL-Blocking-Awareness for Direct Topologies.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Computational Science, 2013

Exploiting Parallelization on Address Translation: Shared Page Walk Cache.

[BibT_eX]

[DOI]

Albert Esteve

Ricardo Fernández Pascual

Antonio Robles

Proceedings of the Euro-Par 2013: Parallel Processing Workshops, 2013

2012

Extending Magny-Cours Cache Coherence.

[BibT_eX]

[DOI]

Alberto Ros

Blas Cuesta Saez

IEEE Trans. Computers, 2012

A New Family of Hybrid Topologies for Large-Scale Interconnection Networks.

[BibT_eX]

[DOI]

Proceedings of the 11th IEEE International Symposium on Network Computing and Applications, 2012

Cache Miss Characterization in Hierarchical Large-Scale Cache-Coherent Systems.

[BibT_eX]

[DOI]

Proceedings of the 10th IEEE International Symposium on Parallel and Distributed Processing with Applications, 2012

IODET: A HoL-blocking-aware Deterministic Routing Algorithm for Direct Topologies.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE International Conference on Parallel and Distributed Systems, 2012

OMHI 2012: First International Workshop on On-chip Memory Hierarchies and Interconnects: Organization, Management and Implementation.

[BibT_eX]

[DOI]

Salvador Petit

Proceedings of the Euro-Par 2012: Parallel Processing Workshops, 2012

Towards an Efficient Fat-Tree like Topology.

[BibT_eX]

[DOI]

Diego F. Bermúdez Garzón

María Engracia Gómez Requena

Proceedings of the Euro-Par 2012 Parallel Processing - 18th International Conference, 2012

Detecting Sharing Patterns in Industrial Parallel Applications for Embedded Heterogeneous Multicore Systems.

[BibT_eX]

[DOI]

Proceedings of the Euro-Par 2012: Parallel Processing Workshops, 2012

PS-Dir: a scalable two-level directory cache.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2012

2011

Networks, Fault-Tolerant.

[BibT_eX]

[DOI]

Proceedings of the Encyclopedia of Parallel Computing, 2011

How to reduce packet dropping in a bufferless NoC.

[BibT_eX]

[DOI]

Concurr. Comput. Pract. Exp., 2011

Increasing the effectiveness of directory caches by deactivating coherence for private memory blocks.

[BibT_eX]

[DOI]

Proceedings of the 38th International Symposium on Computer Architecture (ISCA 2011), 2011

Exploiting Network-on-Chip structural redundancy for a cooperative and scalable built-in self-test architecture.

[BibT_eX]

[DOI]

Alessandro Strano

Proceedings of the Design, Automation and Test in Europe, 2011

2010

Improved Utilization of NoC Channel Bandwidth by Switch Replication for Cost-Effective Multi-processor Systems-on-Chip.

[BibT_eX]

[DOI]

Georgi Nedeltchev Gaydadjiev

Simone Medardoni

Davide Bertozzi

Proceedings of the NOCS 2010, 2010

Contrasting topologies for regular interconnection networks under the constraints of nanoscale silicon technology.

[BibT_eX]

[DOI]

Daniele Ludovici

Ricardo Fernández Pascual

Davide Bertozzi

Proceedings of the Third International Workshop on Network on Chip Architectures, 2010

EMC2: Extending Magny-Cours coherence for large-scale servers.

[BibT_eX]

[DOI]

Alberto Ros

Blas Cuesta

Proceedings of the 2010 International Conference on High Performance Computing, 2010

2009

FT2EI: A Dynamic Fault-Tolerant Routing Methodology for Fat Trees with Exclusion Intervals.

[BibT_eX]

[DOI]

María Engracia Gómez Requena

J. F. D. Marin

IEEE Trans. Parallel Distributed Syst., 2009

Assessing fat-tree topologies for regular network-on-chip design under nanoscale technology constraints.

[BibT_eX]

[DOI]

Daniele Ludovici

Simone Medardoni

Georgi Nedeltchev Gaydadjiev

Davide Bertozzi

Proceedings of the Design, Automation and Test in Europe, 2009

2008

Beyond Fat-tree: Unidirectional Load--Balanced Multistage Interconnection Network.

[BibT_eX]

[DOI]

IEEE Comput. Archit. Lett., 2008

Exploiting Wiring Resources on Interconnection Network: Increasing Path Diversity.

[BibT_eX]

[DOI]

Proceedings of the 16th Euromicro International Conference on Parallel, 2008

Exploring High-Dimensional Topologies for NoC Design Through an Integrated Analysis and Synthesis Framework.

[BibT_eX]

[DOI]

Proceedings of the Second International Symposium on Networks-on-Chips, 2008

RUFT: Simplifying the Fat-Tree Topology.

[BibT_eX]

[DOI]

Proceedings of the 14th International Conference on Parallel and Distributed Systems, 2008

An Efficient Switching Technique for NoCs with Reduced Buffer Requirements.

[BibT_eX]

[DOI]

Proceedings of the 14th International Conference on Parallel and Distributed Systems, 2008

Reducing Packet Dropping in a Bufferless NoC.

[BibT_eX]

[DOI]

Proceedings of the Euro-Par 2008, 2008

2007

An Efficient Fault-Tolerant Routing Methodology for Fat-Tree Interconnection Networks.

[BibT_eX]

[DOI]

Proceedings of the Parallel and Distributed Processing and Applications, 2007

Deterministic versus Adaptive Routing in Fat-Trees.

[BibT_eX]

[DOI]

Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

2006

A Routing Methodology for Achieving Fault Tolerance in Direct Networks.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2006

An Efficient Fault-Tolerant Routing Strategy for Tori and Meshes.

[BibT_eX]

[DOI]

Scalable Comput. Pract. Exp., 2006

FIR: An efficient routing strategy for tori and meshes.

[BibT_eX]

[DOI]

J. Parallel Distributed Comput., 2006

On the Influence of the Selection Function on the Performance of Fat-Trees.

[BibT_eX]

[DOI]

Proceedings of the Euro-Par 2006, Parallel Processing, 12th International Euro-Par Conference, Dresden, Germany, August 28, 2006

2005

A Memory-Effective Fault-Tolerant Routing Strategy for Direct Interconnection Networks.

[BibT_eX]

[DOI]

Proceedings of the 4th International Symposium on Parallel and Distributed Computing (ISPDC 2005), 2005

A Memory-Effective Routing Strategy for Regular Interconnection Networks.

[BibT_eX]

[DOI]

Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005

2004

An Efficient Fault-Tolerant Routing Methodology for Meshes and Tori.

[BibT_eX]

[DOI]

IEEE Comput. Archit. Lett., 2004

A Fully Adaptive Fault-Tolerant Routing Methodology Based on Intermediate Nodes.

[BibT_eX]

[DOI]

Proceedings of the Network and Parallel Computing, IFIP International Conference, 2004

An Effective Fault-Tolerant Routing Methodology for Direct Networks.

[BibT_eX]

[DOI]

Proceedings of the 33rd International Conference on Parallel Processing (ICPP 2004), 2004

A New Adaptive Fault-Tolerant Routing Methodology for Direct Networks.

[BibT_eX]

[DOI]

Proceedings of the High Performance Computing, 2004

2003

VOQSW: A Methodology to Reduce HOL Blocking in InfiniBand Networks.

[BibT_eX]

[DOI]

Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

2002

Evaluation of Routing Algorithms for InfiniBand Networks (Research Note).

[BibT_eX]

[DOI]

Proceedings of the Euro-Par 2002, 2002

2000

A New Approach in the Modeling and Generation of Synthetic Disk Workload.

[BibT_eX]

[DOI]

Vicente Santonja

Proceedings of the MASCOTS 2000, Proceedings of the 8th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems, 29 August, 2000

A new approach in the analysis and modeling of disk access patterns.

[BibT_eX]

[DOI]

Vicente Santonja

Proceedings of the 2000 IEEE International Symposium on Performance Analysis of Systems and Software, 2000

1999

Analysis of Self-Similarity in I/O Workload Using Structural Modeling.

[BibT_eX]

[DOI]