María C. Molina
According to our database1,
María C. Molina
authored at least 33 papers
between 2000 and 2014.
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Bibliography
2014
Improving circuit performance with multispeculative additive trees in high-level synthesis.
Microelectron. J., 2014
2013
A fragmentation aware High-Level Synthesis flow for low power heterogenous datapaths.
Integr., 2013
Proceedings of the Design, Automation and Test in Europe, 2013
2012
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012
2011
A Distributed Controller for Managing Speculative Functional Units in High Level Synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
Proceedings of the Design, Automation and Test in Europe, 2011
2010
IEEE Trans. Very Large Scale Integr. Syst., 2010
Proceedings of the Design, Automation and Test in Europe, 2010
2009
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009
IEEE Des. Test Comput., 2009
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009
2008
Proceedings of the 26th International Conference on Computer Design, 2008
Exploiting Internal Operation Patterns during the High-Level Synthesis of Time-Constrained Circuits.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008
Restricted Chaining and Fragmentation Techniques in Power Aware High Level Synthesis.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008
2007
Exploiting Bit-Level Delay Calculations to Soften Read-After-Write Dependences in Behavioral Synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
2006
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
2005
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005
Proceedings of the 2005 Design, 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
2004
Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004
Proceedings of the 2004 Design, 2004
2003
Allocation of multiple precision behaviors for maximal bit level reuse of hardware resources.
J. Syst. Archit., 2003
Proceedings of the Integrated Circuit and System Design, 2003
Proceedings of the 2003 Design, 2003
2002
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002
Proceedings of the 2002 Euromicro Symposium on Digital Systems Design (DSD 2002), 2002
Efficient Verification of Scheduling, Allocation and Binding in High-Level Synthesis.
Proceedings of the 2002 Euromicro Symposium on Digital Systems Design (DSD 2002), 2002
Proceedings of the 2002 Design, 2002
High-level synthesis of multiple-precision circuitsindependent of data-objects length.
Proceedings of the 39th Design Automation Conference, 2002
2000
Proceedings of the 13th International Symposium on System Synthesis, 2000