Marek Syrzycki

According to our database, Marek Syrzycki authored at least 14 papers between 1992 and 2016.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2016

Charge-based femto-farad capacitance measurement technique for MEMS applications.

Adrian Tanskanen, Behraad Bahreyni, Marek Syrzycki

Proceedings of the 2016 IEEE Canadian Conference on Electrical and Computer Engineering, 2016

2013

Investigation of STI diodes as electrostatic discharge (ESD) protection devices in deep submicron (DSM) CMOS process.

Thomas Au, Marek Syrzycki

Proceedings of the 26th IEEE Canadian Conference on Electrical and Computer Engineering CCECE 2013, 2013

2012

A high performance NMOS-switch high swing cascode charge pump for phase-locked loops.

Cheng Zhang, Thomas Au, Marek Syrzycki

Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

2011

Single-Stage Vernier Time-to-Digital Converter with Sub-Gate Delay Time Resolution.

Chin-Hsin Lin, Marek Syrzycki

Circuits Syst., 2011

Process variation compensated voltage controlled ring oscillator with Subtraction-based Voltage Controlled Current Source.

Cheng Zhang, Ming-Cheng Lin, Marek Syrzycki

Proceedings of the 24th Canadian Conference on Electrical and Computer Engineering, 2011

Current source transistor optimization methodology for noise optimized charge sensitive amplifier with fast shaper.

Ming-Cheng Lin, Marek Syrzycki

Proceedings of the 24th Canadian Conference on Electrical and Computer Engineering, 2011

2007

Triple-Threshold Static Power Minimization in High-Level Synthesis of VLSI CMOS.

Harry I. A. Chen, Edward K. W. Loo, James B. Kuo, Marek Syrzycki

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2007

2006

Tunable continuous-time bandpass ΣΔ modulators with fractional delays.

Robert Sobot, Shawn P. Stapleton, Marek Syrzycki

IEEE Trans. Circuits Syst. I Regul. Pap., 2006

2004

SERDES Technology for Gigabit I/O Communications in Storage Area Networking.

Krzysztof Iniewski, R. Badalone, M. Lapointe, Marek Syrzycki

Proceedings of the 4th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'04), 2004

Design Strategies for ESD Protection in SOC.

Krzysztof Iniewski, Valery Axelrad, Andrei Shibkov, Artur Balasinski, Marek Syrzycki

Proceedings of the 4th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'04), 2004

Low Power 2.5 Gb/s Serializer for SOC Applications.

Krzysztof Iniewski, Marek Syrzycki

Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004

Phase Locked Loop gain shaping for gigahertz operation.

Krzysztof Iniewski, Sebastian Magierowski, Marek Syrzycki

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2002

Manufacturability Analysis of Analog CMOS ICs through Examination of Multiple Layout Solutions.

Pedram Khademsameni, Marek Syrzycki

Proceedings of the 17th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2002), 2002

1992

Wafer-Scale Transducer Arrays.

Glenn H. Chapman, M. Parameswaran, Marek Syrzycki

Computer, 1992