Marcos T. Leipnitz

Orcid: 0000-0003-1959-1755

Affiliations:
  • Federal University of Rio Grande do Sul, Brazil


According to our database1, Marcos T. Leipnitz authored at least 12 papers between 2016 and 2025.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

2016
2017
2018
2019
2020
2021
2022
2023
2024
2025
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Legend:

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In proceedings 
Article 
PhD thesis 
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Other 

Links

Online presence:

On csauthors.net:

Bibliography

2025
A Framework for testing Federated Learning algorithms using an edge-like environment.
Future Gener. Comput. Syst., 2025

2024
Developing an ontology-based system for retrieving and contextualizing petroleum production data.
Proceedings of the Joint Ontology Workshops (JOWO), 2024

2023
Constraint-Aware Multi-Technique Approximate High-Level Synthesis for FPGAs.
ACM Trans. Reconfigurable Technol. Syst., December, 2023

2021
Lightweight Dual Modular Redundancy through Approximate Computing.
Proceedings of the XI Brazilian Symposium on Computing Systems Engineering, 2021

2020
Enhancing Real-Time Motion Estimation through Approximate High-Level Synthesis.
Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020

Throughput-Oriented Spatio-Temporal Optimization in Approximate High-Level Synthesis.
Proceedings of the 38th IEEE International Conference on Computer Design, 2020

High-level synthesis of throughput-optimized and energy-efficient approximate designs.
Proceedings of the 17th ACM International Conference on Computing Frontiers, 2020

2019
High-Level Synthesis of Approximate Designs under Real-Time Constraints.
ACM Trans. Embed. Comput. Syst., 2019

High-Level Synthesis of Resource-oriented Approximate Designs for FPGAs.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018
Fault Tolerance Mechanisms for FPGA-Based Regular Expression Matching.
J. Electron. Test., 2018

2016
A fault injection platform for FPGA-based communication systems.
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016

Low cost resilient regular expression matching on FPGAs.
Proceedings of the 2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2016


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