Marcone Laure
Orcid: 0000-0002-6372-6891
According to our database1,
Marcone Laure
authored at least 3 papers
between 2008 and 2019.
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Bibliography
2019
A Dynamic Reconfigurable Super-VLIW Architecture for a Fault Tolerant Nanoscale Design.
Trans. High Perform. Embed. Archit. Compil., 2019
2009
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009
2008
Reducing interconnection cost in coarse-grained dynamic computing through multistage network.
Proceedings of the FPL 2008, 2008