Marco Zulianello

According to our database¹, Marco Zulianello authored at least 8 papers between 2012 and 2016.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Timeline

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Bibliography

2016

Data Bus Slicing for Contention-Free Multicore Real-Time Memory Systems.

[BibT_eX]

[DOI]

Proceedings of the 11th IEEE Symposium on Industrial Embedded Systems, 2016

Contention-aware performance monitoring counte support for real-time MPSoCs.

[BibT_eX]

[DOI]

Proceedings of the 11th IEEE Symposium on Industrial Embedded Systems, 2016

2015

Introduction to partial time composability for COTS multicores.

[BibT_eX]

[DOI]

Proceedings of the 30th Annual ACM Symposium on Applied Computing, 2015

Seeking Time-Composable Partitions of Tasks for COTS Multicore Processors.

[BibT_eX]

[DOI]

Proceedings of the IEEE 18th International Symposium on Real-Time Distributed Computing, 2015

2014

A Dual-Criticality Memory Controller (DCmc): Proposal and Evaluation of a Space Case Study.

[BibT_eX]

[DOI]

Proceedings of the IEEE 35th IEEE Real-Time Systems Symposium, 2014

AHRB: A high-performance time-composable AMBA AHB bus.

[BibT_eX]

[DOI]

Proceedings of the 20th IEEE Real-Time and Embedded Technology and Applications Symposium, 2014

2013

Deconstructing bus access control policies for Real-Time multicores.

[BibT_eX]

[DOI]

Proceedings of the 8th IEEE International Symposium on Industrial Embedded Systems, 2013

2012

Assessing the suitability of the NGMP multi-core processor in the space domain.

[BibT_eX]

[DOI]

Proceedings of the 12th International Conference on Embedded Software, 2012

Marco Zulianello

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