Marco Stolba

According to our database1, Marco Stolba authored at least 8 papers between 2020 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
A Low-footprint FFT Accelerator for a RISC-V-based Multi-core DSP in FMCW Radars.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023
A RISC-V MCU with adaptive reverse body bias and ultra-low-power retention mode in 22 nm FD-SOI.
Proceedings of the 20th International SoC Design Conference, 2023

A 12-ADC 25-Core Smart MPSoC Using ABB in 22FDX for 77GHz MIMO Radars at 52.6mW Average Power.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

2022
A 16-Channel Fully Configurable Neural SoC With 1.52 $\mu$W/Ch Signal Acquisition, 2.79 $\mu$W/Ch Real-Time Spike Classifier, and 1.79 TOPS/W Deep Neural Network Accelerator in 22 nm FDSOI.
IEEE Trans. Biomed. Circuits Syst., 2022

2021
Hardware Implementation of an OPC UA Server for Industrial Field Devices.
IEEE Trans. Very Large Scale Integr. Syst., 2021

The SpiNNaker 2 Processing Element Architecture for Hybrid Digital Neuromorphic Computing.
CoRR, 2021

Ultra-High Compression of Twiddle Factor ROMs in Multi-Core DSP for FMCW Radars.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
Mapping Deep Neural Networks on SpiNNaker2.
Proceedings of the NICE '20: Neuro-inspired Computational Elements Workshop, 2020


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