Marco Bekooij
According to our database1,
Marco Bekooij
authored at least 92 papers
between 1998 and 2022.
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Bibliography
2022
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2022
Deep-MLE: Fusion between a Neural Network and MLE for A Single Snapshot DOA Estimation.
Proceedings of the IEEE International Conference on Acoustics, 2022
Energy-Efficient Radix-4 Belief Propagation Polar Code Decoding Using an Efficient Sign-Magnitude Adder and Clock Gating.
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022
2021
Proceedings of the DASIP '21: Workshop on Design and Architectures for Signal and Image Processing (14th edition), 2021
An Optimal Variable-Latency Architecture for Deterministic Approaches to Stochastic Computing with Unary Bit Stream Preserving Properties.
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2021
Low-Power Booth Multiplication without Dynamic Range Detection in FFTs for FMCW Radar Signal Processing.
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2021
Computational Complexity Reduced Belief Propagation Algorithm for Polar Code Decoders.
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2021
Enhanced Loop-weakened Belief Propagation Algorithm for Performance Enhanced Polar Code Decoders.
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2021
2020
Conflict-Free Vectorized In-order In-place Radix-r Belief Propagation Polar Code Decoder Algorithm.
Proceedings of the ICCBN 2020: 8th International Conference on Communications and Broadband Networking, 2020
Dynamics-aware subspace identification for decomposed aggregation in the reachability analysis of hybrid automata.
Proceedings of the HSCC '20: 23rd ACM International Conference on Hybrid Systems: Computation and Control, 2020
2019
Trans. High Perform. Embed. Archit. Compil., 2019
Proceedings of the 22nd International Workshop on Software and Compilers for Embedded Systems, 2019
2018
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018
2017
ACM Trans. Embed. Comput. Syst., 2017
Proceedings of the 20th International Workshop on Software and Compilers for Embedded Systems, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
2016
Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems, 2016
Compositional Temporal Analysis Method for Fixed Priority Pre-emptive Scheduled Modal Stream Processing Applications.
Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems, 2016
Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems, 2016
Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems, 2016
Combining Offsets with Precedence Constraints to Improve Temporal Analysis of Cyclic Real-Time Streaming Applications.
Proceedings of the 2016 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS), 2016
Temporal Analysis of Static Priority Preemptive Scheduled Cyclic Streaming Applications using CSDF Models.
Proceedings of the 14th ACM/IEEE Symposium on Embedded Systems for Real-Time Multimedia, 2016
Proceedings of the 2016 International Conference on Embedded Software, 2016
2015
Utilization Improvement by Enforcing Mutual Exclusive Task Execution in Modal Stream Processing Applications.
Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems, 2015
Buffer Sizing to Reduce Interference and Increase Throughput of Real-Time Stream Processing Applications.
Proceedings of the IEEE 18th International Symposium on Real-Time Distributed Computing, 2015
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015
2014
Temporal analysis flow based on an enabling rate characterization for multi-rate applications executed on mpsocs with non-starvation-free schedulers.
Proceedings of the 17th International Workshop on Software and Compilers for Embedded Systems, 2014
Temporal analysis model extraction for optimizing modal multi-rate stream processing applications.
Proceedings of the 17th International Workshop on Software and Compilers for Embedded Systems, 2014
Efficient end-to-end latency distribution analysis for probabilistic time-triggered systems.
Proceedings of the XIVth International Conference on Embedded Computer Systems: Architectures, 2014
Proceedings of the 2014 PPOPP International Workshop on Programming Models and Applications for Multicores and Manycores, 2014
Unified dataflow model for the analysis of data and pipeline parallelism, and buffer sizing.
Proceedings of the Twelfth ACM/IEEE International Conference on Formal Methods and Models for Codesign, 2014
Hierarchical Programming Language for Modal Multi-rate Real-Time Stream Processing Applications.
Proceedings of the 43rd International Conference on Parallel Processing Workshops, 2014
Accuracy Improvement of Dataflow Analysis for Cyclic Stream Processing Applications Scheduled by Static Priority Preemptive Schedulers.
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014
Low-cost guaranteed-throughput dual-ring communication infrastructure for heterogeneous MPSoCs.
Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing, 2014
2013
ACM Trans. Embed. Comput. Syst., 2013
Proceedings of the International Workshop on Software and Compilers for Embedded Systems, 2013
Proceedings of the 19th IEEE Real-Time and Embedded Technology and Applications Symposium, 2013
Automatic dataflow model extraction from modal real-time stream processing applications.
Proceedings of the SIGPLAN/SIGBED Conference on Languages, 2013
Portable Memory Consistency for Software Managed Distributed Memory in Many-Core SoC.
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013
2012
Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012
Sequential specification of time-aware stream processing applications (Extended abstract).
Proceedings of the IEEE 10th Symposium on Embedded Systems for Real-time Multimedia, 2012
Proceedings of the 12th International Conference on Embedded Software, 2012
Evaluation of a Connectionless NoC for a Real-Time Distributed Shared Memory Many-Core System.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012
Proceedings of the 15th International Conference on Compilers, 2012
2011
Proceedings of the 2011 International Conference on Embedded Computer Systems: Architectures, 2011
Evaluation of scheduling heuristics for jitter reduction of real-time streaming applications on multi-core general purpose hardware.
Proceedings of the 9th IEEE Symposium on Embedded Systems for Real-Time Multimedia, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
Parallelization of while loops in nested loop programs for shared-memory multiprocessor systems.
Proceedings of the Design, Automation and Test in Europe, 2011
2010
ACM Trans. Embed. Comput. Syst., 2010
Simultaneous budget and buffer size computation for throughput-constrained task graphs.
Proceedings of the Design, Automation and Test in Europe, 2010
Proceedings of the 8th International Conference on Hardware/Software Codesign and System Synthesis, 2010
2009
ACM Trans. Design Autom. Electr. Syst., 2009
Enabling application-level performance guarantees in network-based systems on chip by applying dataflow analysis.
IET Comput. Digit. Tech., 2009
Inter-task communication via overlapping read and write windows for deadlock-free execution of cyclic task graphs.
Proceedings of the 2009 International Conference on Embedded Computer Systems: Architectures, 2009
Proceedings of the 9th ACM & IEEE International conference on Embedded software, 2009
Proceedings of the 9th ACM & IEEE International conference on Embedded software, 2009
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009
Proceedings of the Design, Automation and Test in Europe, 2009
Proceedings of the 7th International Conference on Hardware/Software Codesign and System Synthesis, 2009
2008
Communication between nested loop programs via circular buffers in an embedded multiprocessor system.
Proceedings of the 11th International Workshop on Software and Compilers for Embedded Systems, 2008
Buffer Capacity Computation for Throughput Constrained Streaming Applications with Data-Dependent Inter-Task Communication.
Proceedings of the 14th IEEE Real-Time and Embedded Technology and Applications Symposium, 2008
Applying Dataflow Analysis to Dimension Buffers for Guaranteed Performance in Networks on Chip.
Proceedings of the Second International Symposium on Networks-on-Chips, 2008
Computation of Buffer Capacities for Throughput Constrained and Data Dependent Inter-Task Communication.
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
2007
EURASIP J. Adv. Signal Process., 2007
Exploiting the Expressiveness of Cyclo-Static Dataflow to Model Multimedia Implementations.
EURASIP J. Adv. Signal Process., 2007
Proceedings of the 10th International Workshop on Software and Compilers for Embedded Systems, 2007
Efficient buffer capacity and scheduler setting computation for soft real-time stream processing applications.
Proceedings of the 10th International Workshop on Software and Compilers for Embedded Systems, 2007
Proceedings of the 2007 ACM Symposium on Applied Computing (SAC), 2007
Efficient Computation of Buffer Capacities for Cyclo-Static Real-Time Systems with Back-Pressure.
Proceedings of the 13th IEEE Real-Time and Embedded Technology and Applications Symposium, 2007
Proceedings of the 15th International Symposium on Modeling, 2007
Scheduling multiple independent hard-real-time jobs on a heterogeneous multiprocessor.
Proceedings of the 7th ACM & IEEE International conference on Embedded software, 2007
Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007
Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007
Proceedings of the 44th Design Automation Conference, 2007
2006
Comparison of an Æthereal Network on Chip and Traditional Interconnects - Two Case Studies.
Proceedings of the VLSI-SoC: Research Trends in VLSI and Systems on Chip, 2006
Efficient computation of buffer capacities for multi-rate real-time systems with back-pressure.
Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, 2006
Proceedings of the Sixth International Conference on Application of Concurrency to System Design (ACSD 2006), 2006
2005
Proceedings of the 9th International Workshop on Software and Compilers for Embedded Systems, Dallas, Texas, USA, September 29, 2005
Multiprocessor Resource Allocation for Hard-Real-Time Streaming with a Dynamic Job-Mix.
Proceedings of the 11th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2005), 2005
Extended abstract: estimation times of on-chip multiprocessor stream-oriented applications.
Proceedings of the 3rd ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2005), 2005
2004
Proceedings of the Software and Compilers for Embedded Systems, 8th International Workshop, 2004
2003
Task-level timing models for guaranteed performance in multiprocessor networks-on-chip.
Proceedings of the International Conference on Compilers, 2003
2001
Phase coupled operation assignment for VLIW processors with distributed register files.
Proceedings of the 14th International Symposium on Systems Synthesis, 2001
Proceedings of the Conference on Design, Automation and Test in Europe, 2001
Proceedings of the Conference on Design, Automation and Test in Europe, 2001
2000
J. VLSI Signal Process., 2000
ACM Trans. Design Autom. Electr. Syst., 2000
Proceedings of the 13th International Symposium on System Synthesis, 2000
1998
A power-efficient single-chip OFDM demodulator and channel decoder for multimedia broadcasting.
IEEE J. Solid State Circuits, 1998