Marco Balboni
According to our database1,
Marco Balboni
authored at least 11 papers
between 2013 and 2017.
Collaborative distances:
Collaborative distances:
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Bibliography
2017
Concurrent network-on-chip lifetime testing through selective disconnection of its communication channels.
Proceedings of the 15th IEEE International New Circuits and Systems Conference, 2017
Transparent lifetime built-in self-testing of networks-on-chip through the selective non-concurrent testing of their communication channels.
Proceedings of the 2nd International Workshop on Advanced Interconnect Solutions and Technologies for Emerging Computing Systems, 2017
Accurate Assessment of Bundled-Data Asynchronous NoCs Enabled by a Predictable and Efficient Hierarchical Synthesis Flow.
Proceedings of the 23rd IEEE International Symposium on Asynchronous Circuits and Systems, 2017
2016
NoC-Centric Partitionin and Reconfiguration Technology for the Efficient Sharing of General-Purose Prorammable Many-core Accelerators.
PhD thesis, 2016
Populating and exploring the design space of wavelength-routed optical network-on-chip topologies by leveraging the add-drop filtering primitive.
Proceedings of the Tenth IEEE/ACM International Symposium on Networks-on-Chip, 2016
Evolutionary vs. Revolutionary Interconnect Technologies for Future Low-Power Multi-Core Systems.
Proceedings of the 1st International Workshop on Advanced Interconnect Solutions and Technologies for Emerging Computing Systems, 2016
2015
NoC-centric partitioning and reconfiguration technologies for the efficient sharing of multi-core programmable accelerators.
Proceedings of the 2015 International Conference on High Performance Computing & Simulation, 2015
Partitioning Strategies of Wavelength-Routed Optical Networks-on-Chip for Laser Power Minimization.
Proceedings of the 2015 Workshop on Exploiting Silicon Photonics for Energy-Efficient High Performance Computing, 2015
Synergistic use of multiple on-chip networks for ultra-low latency and scalable distributed routing reconfiguration.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
2014
Augmenting manycore programmable accelerators with photonic interconnect technology for the high-end embedded computing domain.
Proceedings of the Eighth IEEE/ACM International Symposium on Networks-on-Chip, 2014
2013
Optimizing the overhead for network-on-chip routing reconfiguration in parallel multi-core platforms.
Proceedings of the 2013 International Symposium on System on Chip, 2013