Marco Annaratone

According to our database, Marco Annaratone authored at least 16 papers between 1983 and 1998.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

1998

Warp Architecture and Implementation.

Marco Annaratone, Emmanuel A. Arnould, Thomas R. Gross, H. T. Kung, Monica S. Lam, Onat Menzilcioglu, Ken Sarocky, Jon A. Webb

Proceedings of the 25 Years of the International Symposia on Computer Architecture (Selected Papers)., 1998

1994

Digital Equipment Corporation High Performance Fortran on Workstation Farms.

Marco Annaratone, Carl D. Offner, David B. Loveman

Proceedings of the 8th International Symposium on Parallel Processing, 1994

1992

A Set of New Mapping and Coloring Heuristics for Distributed-Memory Parallel Processors.

Claude Pommerell, Marco Annaratone, Wolfgang Fichtner

SIAM J. Sci. Comput., 1992

1991

The K2 distributed memory parallel processor: architecture, compiler, and operating system.

Marco Annaratone, Marco Fillo, M. Halbherr, Roland Rühl, P. Steiner, Marc A. Viredaz

Proceedings of the Proceedings Supercomputing '91, 1991

Architecture, Implementation and System Software of K2.

Marco Annaratone, G. zur Bonsen, Marco Fillo, M. Halbherr, Roland Rühl, P. Steiner, Marc A. Viredaz

Proceedings of the Distributed Memory Computing, 2nd European Conference, 1991

1990

The K2 Parallel Processor: Architecture and Hardware Implementation.

Marco Annaratone, Marco Fillo, Kiyoshi Nakabayashi, Marc A. Viredaz

Proceedings of the 17th Annual International Symposium on Computer Architecture, 1990

Parallelization of FORTRAN code on distributed-memory parallel processors.

Roland Rühl, Marco Annaratone

Proceedings of the 4th international conference on Supercomputing, 1990

1989

K9: a simulator of distributed-memory parallel processors.

Peter Beadle, Claude Pommerell, Marco Annaratone

Proceedings of the Proceedings Supercomputing '89, Reno, NV, USA, November 12-17, 1989, 1989

Performance Measurements on a Commercial Multiprocessor Running Parallel Code.

Marco Annaratone, Roland Rühl

Proceedings of the 16th Annual International Symposium on Computer Architecture. Jerusalem, 1989

Interprocessor Communication Speed and Performance in Distributed-memory Parallel Processors.

Marco Annaratone, Claude Pommerell, Roland Rühl

Proceedings of the 16th Annual International Symposium on Computer Architecture. Jerusalem, 1989

1987

The Warp Computer: Architecture, Implementation, and Performance.

Marco Annaratone, Emmanuel A. Arnould, Thomas R. Gross, H. T. Kung, Monica Lam, Onat Menzilcioglu, Jon A. Webb

IEEE Trans. Computers, 1987

Applications and Algorithm Partitioning on Warp.

Marco Annaratone, Francois J. Bitz, Ed Clune, H. T. Kung, Prabir C. Maulik, Hudson Benedito Ribas, P. S. Tseng, Jon A. Webb

Proceedings of the COMPCON'87, 1987

Architecture of Warp.

Marco Annaratone, Emmanuel A. Arnould, Robert Cohn, Thomas R. Gross, H. T. Kung, Monica S. Lam, Onat Menzilcioglu, Ken Sarocky, John Senko, Jon A. Webb

Proceedings of the COMPCON'87, 1987

1986

Using warp as a supercomputer in signal processing.

Marco Annaratone, Emmanuel A. Arnould, H. T. Kung, Onat Menzilcioglu

Proceedings of the IEEE International Conference on Acoustics, 1986

1985

SPLASH: A framework for chip design and layout.

Marco Annaratone

Integr., 1985

1983

A multiplier with multiple error correction capability.

Marco Annaratone, Renato Stefanelli

Proceedings of the 6th IEEE Symposium on Computer Arithmetic, 1983