Marco Angioli
Orcid: 0009-0002-5955-8378
According to our database1,
Marco Angioli
authored at least 9 papers
between 2022 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
Design, Implementation and Evaluation of a New Variable Latency Integer Division Scheme.
IEEE Trans. Computers, July, 2024
Dynamic Triple Modular Redundancy in Interleaved Hardware Threads: An Alternative Solution to Lockstep Multi-Cores for Fault-Tolerant Systems.
IEEE Access, 2024
Proceedings of the 19th Conference on Ph.D Research in Microelectronics and Electronics, 2024
2023
Automatic Hardware Accelerators Reconfiguration through LinearUCB Algorithms on a RISC-V Processor.
Proceedings of the 18th Conference on Ph.D Research in Microelectronics and Electronics, 2023
A Universal Hardware Emulator for Verification IPs on FPGA: A Novel and Low-Cost Approach.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2023
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2023
Single Event Transient Reliability Analysis on a Fault-Tolerant RISC-V Microprocessor Design.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2023
2022
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2022
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2022