Márcio Bystronski
According to our database1,
Márcio Bystronski
authored at least 2 papers
in 2002.
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Bibliography
2002
Finding the Critical Delay of Combinational Blocks by Floating Vector Simulation and Path Tracing.
Proceedings of the 15th Annual Symposium on Integrated Circuits and Systems Design, 2002
A Comparison Between Testability Measures Applied to Complex Gates.
Proceedings of the 3rd Latin American Test Workshop, 2002