Marcial Jesús Rodríguez-Irago

According to our database, Marcial Jesús Rodríguez-Irago authored at least 5 papers between 2005 and 2008.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2008

Signal Integrity Enhancement in Digital Circuits.

Jorge Semião, Marcial Jesús Rodríguez-Irago, Juan J. Rodríguez-Andina, Leonardo Bisch Piccoli, Fabian Vargas, Marcelino Bicho Dos Santos, Isabel Maria Cacho Teixeira, João Paulo Teixeira

IEEE Des. Test Comput., 2008

2006

Using Multiple Clock Schemes and Multi-Temperature Test for Dynamic Fault Detection in Digital Systems.

Marcial Jesús Rodríguez-Irago, Juan J. Rodríguez-Andina, Fabian Vargas, Isabel C. Teixeira, João Paulo Teixeira

Proceedings of the 7th Latin American Test Workshop, 2006

Dynamic Fault Detection in Digital Systems Using Dynamic Voltage Scaling and Multi-Temperature Schemes.

Marcial Jesús Rodríguez-Irago, Juan J. Rodríguez-Andina, Fabian Vargas, Jorge Semião, Isabel C. Teixeira, João Paulo Teixeira

Proceedings of the 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 2006

2005

Fault Modeling and Simulation of Power Supply Voltage Transients in Digital Systems on a Chip.

D. Barros Júnior, Marcial Jesús Rodríguez-Irago, Marcelino B. Santos, Isabel C. Teixeira, Fabian Vargas, João Paulo Teixeira

J. Electron. Test., 2005

Dynamic Fault Test and Diagnosis in Digital Systems Using Multiple Clock Schemes and Multi-VDD Test.

Marcial Jesús Rodríguez-Irago, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira

Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 2005