Marcelo Daniel Berejuck

Orcid: 0000-0002-5276-821X

According to our database1, Marcelo Daniel Berejuck authored at least 13 papers between 2009 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
MPI hardware framework for many-core based embedded systems.
Int. J. Sens. Networks, 2021

Main Attacks and Ways to Keep Security Guidelines Updated in Remote Laboratories.
Proceedings of the Online Engineering and Society 4.0, 2021

Work-in Progress: Development of an E-learning FPGA Platform Following the IEEE SA Std. 1876 - 2019 Standard for Networked Smart Learning Objects for Online Laboratories.
Proceedings of the Online Engineering and Society 4.0, 2021

Evaluation of blockchain techniques to ensure secure access on remote FPGA laboratories.
Proceedings of the 9th International Symposium on Digital Forensics and Security, 2021

2020
Finite-State Markov Chains Channel Model for CubeSats Communication Uplink.
IEEE Trans. Aerosp. Electron. Syst., 2020

2019
Dedicated monitoring service without routing mitigation for Networks-on-Chip.
Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019

2018
A dynamic partial reconfiguration design flow for permanent faults mitigation in FPGAs.
Microelectron. Reliab., 2018

2017
A Digital Implementation of Eddystone Standard Using IBM 180nm Cell Library.
Proceedings of the VII Brazilian Symposium on Computing Systems Engineering, 2017

2016
Evaluation of a Connectionless Technique for System-on-Chip Interconnection.
J. Circuits Syst. Comput., 2016

An overview about Networks-on-Chip with multicast suppor.
CoRR, 2016

2015
Network-on-Chip with load balancing based on interleave of flits technique.
CoRR, 2015

2014
Evaluation of silicon consumption for a connectionless Network-on-Chip.
CoRR, 2014

2009
Adding mechanisms for QoS to a network-on-chip.
Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, 2009


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