Marcelo Antonio Pavanello
According to our database1,
Marcelo Antonio Pavanello
authored at least 20 papers
between 2001 and 2024.
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Bibliography
2024
Electrical Characterization of nMOSFETs from a 180 nm Commercial Technology at Low Temperatures.
Proceedings of the 21st International Conference on Electrical Engineering, 2024
Experimental Decomposition of the Carrier Mobility in the Conduction Planes of 2-Level Stacked Nanowires.
Proceedings of the 21st International Conference on Electrical Engineering, 2024
2021
Proceedings of the 51st IEEE European Solid-State Device Research Conference, 2021
2019
Compact Analytical Model for Trap-Related Low Frequency Noise in Junctionless Transistors.
Proceedings of the 49th European Solid-State Device Research Conference, 2019
Proceedings of the 49th European Solid-State Device Research Conference, 2019
2017
Microelectron. Reliab., 2017
Proceedings of the 47th European Solid-State Device Research Conference, 2017
2016
Microelectron. Reliab., 2016
Temperature dependence of the electrical characteristics up to 370 K of amorphous In-Ga-ZnO thin film transistors.
Microelectron. Reliab., 2016
Experimental and simulation analysis of electrical characteristics of common-source current mirrors implemented with asymmetric self-cascode silicon-on-insulator n-channel metal-oxide-semiconductor field-effect transistors.
IET Circuits Devices Syst., 2016
Proceedings of the 46th European Solid-State Device Research Conference, 2016
2013
Asymmetric channel doping profile and temperature reduction influence on the performance of current mirrors implemented with FD SOI nMOSFETs.
Microelectron. Reliab., 2013
2012
An analytic method to compute the stress dependence on the dimensions and its influence in the characteristics of triple gate devices.
Microelectron. Reliab., 2012
2011
An explicit multi-exponential model for semiconductor junctions with series and shunt resistances.
Microelectron. Reliab., 2011
2008
Harmonic distortion analysis of double gate graded-channel MOSFETs operating in saturation.
Microelectron. J., 2008
2006
Cryogenic operation of graded-channel silicon-on-insulator nMOSFETs for high performance analog applications.
Microelectron. J., 2006
Gain improvement in operational transconductance amplifiers using Graded-Channel SOI nMOSFETS.
Microelectron. J., 2006
Microelectron. J., 2006
2003
Design of Operational Transconductance Amplifiers with Improved Gain by Using Graded-Channel SOI nMOSFETs.
Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, 2003
2001
Proceedings of the 14th Annual Symposium on Integrated Circuits and Systems Design, 2001