Marcello Traiola

Juan-David Guerrero-Balaguera

Josie E. Rodriguez Condia

Matteo Sonza Reorda

Mahdi Taheri

Proceedings of the 42nd IEEE VLSI Test Symposium, 2024

Combining Fault Simulation and Beam Data for CNN Error Rate Estimation on RISC-V Commercial Platforms.

[BibT_eX]

[DOI]

Josie E. Rodriguez Condia

Proceedings of the 30th IEEE International Symposium on On-Line Testing and Robust System Design, 2024

Approximate Fault-Tolerant Neural Network Systems.

[BibT_eX]

[DOI]

Anil Bayram Gogebakan

Enrico Magliano

Alessandro Savino

Proceedings of the IEEE European Test Symposium, 2024

Reliability and Security of AI Hardware.

[BibT_eX]

[DOI]

Annachiara Ruospo

Ernesto Sánchez

Proceedings of the IEEE European Test Symposium, 2024

Cross-Layer Reliability Evaluation and Efficient Hardening of Large Vision Transformers Models.

[BibT_eX]

[DOI]

Lucas Roquet

Pegdwende Romaric Nikiema

Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023

A Survey on Deep Learning Resilience Assessment Methodologies.

[BibT_eX]

[DOI]

Computer, February, 2023

Towards Dependable RISC-V Cores for Edge Computing Devices.

[BibT_eX]

[DOI]

Proceedings of the 29th International Symposium on On-Line Testing and Robust System Design, 2023

harDNNing: a machine-learning-based framework for fault tolerance assessment and protection of DNNs.

[BibT_eX]

[DOI]

Pegdwende Romaric Nikiema

Proceedings of the IEEE European Test Symposium, 2023

Impact of Transient Faults on Timing Behavior and Mitigation with Near-Zero WCET Overhead.

[BibT_eX]

[DOI]

Pegdwende Romaric Nikiema

Proceedings of the 35th Euromicro Conference on Real-Time Systems, 2023

Input-aware accuracy characterization for approximate circuits.

[BibT_eX]

[DOI]

Proceedings of the 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2023

Design with low complexity fine-grained Dual Core Lock-Step (DCLS) RISC-V processors.

[BibT_eX]

[DOI]

Proceedings of the 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2023

A machine-learning-guided framework for fault-tolerant DNNs.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

Exploiting assertions mining and fault analysis to guide RTL-level approximation.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2022

A Genetic-algorithm-based Approach to the Design of DCT Hardware Accelerators.

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., 2022

Assertion-aware approximate computing design exploration on behavioral models.

[BibT_eX]

[DOI]

Proceedings of the 23rd IEEE Latin American Test Symposium, 2022

Improving the Fault Resilience of Neural Network Applications Through Security Mechanisms.

[BibT_eX]

[DOI]

Proceedings of the 52nd Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2022

Selective Hardening of Critical Neurons in Deep Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2022

A Design Space Exploration Framework for Memristor-Based Crossbar Architecture.

[BibT_eX]

[DOI]

Proceedings of the 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2022

Input-Aware Approximate Computing.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Automation, 2022

Test and Reliability of Approximate Hardware.

[BibT_eX]

[DOI]

Proceedings of the Approximate Computing, 2022

2021

Investigating data representation for efficient and reliable Convolutional Neural Networks.

[BibT_eX]

[DOI]

Microprocess. Microsystems, October, 2021

Towards the Integration of Reliability and Security Mechanisms to Enhance the Fault Resilience of Neural Networks.

[BibT_eX]

[DOI]

IEEE Access, 2021

Multi-Objective Application-Driven Approximate Design Method.

[BibT_eX]

[DOI]

IEEE Access, 2021

Pros and Cons of Fault Injection Approaches for the Reliability Assessment of Deep Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the 22nd IEEE Latin American Test Symposium, 2021

Reducing Overprovision of Triple Modular Reduncancy Owing to Approximate Computing.

[BibT_eX]

[DOI]

Proceedings of the 27th IEEE International Symposium on On-Line Testing and Robust System Design, 2021

Design Space Exploration of Approximation-Based Quadruple Modular Redundancy Circuits.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

Emerging Computing Devices: Challenges and Opportunities for Test and Reliability<sup>*</sup>.

[BibT_eX]

[DOI]

Muhammad Abdullah Hanif

Proceedings of the 26th IEEE European Test Symposium, 2021

Efficient Neural Network Approximation via Bayesian Reasoning.

[BibT_eX]

[DOI]

Proceedings of the 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2021

Emerging Technologies: Challenges and Opportunities for Logic Synthesis.

[BibT_eX]

[DOI]

Proceedings of the 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2021

2020

A Survey of Testing Techniques for Approximate Integrated Circuits.

[BibT_eX]

[DOI]

Proc. IEEE, 2020

Evaluating the Code Encryption Effects on Memory Fault Resilience.

[BibT_eX]

[DOI]

Riccardo Cantoro

Matteo Sonza Reorda

Emanuele Valea

Proceedings of the IEEE Latin-American Test Symposium, 2020

QAMR: an Approximation-Based Fully Reliable TMR Alternative for Area Overhead Reduction.

[BibT_eX]

[DOI]

Proceedings of the IEEE European Test Symposium, 2020

Design, Verification, Test and In-Field Implications of Approximate Computing Systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE European Test Symposium, 2020

Evaluating Data Encryption Effects on the Resilience of an Artificial Neural Network.

[BibT_eX]

[DOI]

Riccardo Cantoro

Matteo Sonza Reorda

Emanuele Valea

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2020

Maximizing Yield for Approximate Integrated Circuits.

[BibT_eX]

[DOI]

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2018

Estimating dynamic power consumption for memristor-based CiM architecture.

[BibT_eX]

[DOI]

Mario Barbareschi

Alberto Bosio

Microelectron. Reliab., 2018

Test and Reliability in Approximate Computing.

[BibT_eX]

[DOI]

J. Electron. Test., 2018

Special session: How approximate computing impacts verification, test and reliability.

[BibT_eX]

[DOI]

Proceedings of the 36th IEEE VLSI Test Symposium, 2018

Testing approximate digital circuits: Challenges and opportunities.

[BibT_eX]

[DOI]

Proceedings of the 19th IEEE Latin-American Test Symposium, 2018

Predicting the Impact of Functional Approximation: from Component- to Application-Level.

[BibT_eX]

[DOI]

Proceedings of the 24th IEEE International Symposium on On-Line Testing And Robust System Design, 2018

Investigation of Mean-Error Metrics for Testing Approximate Integrated Circuits.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2018

On the Comparison of Different ATPG Approaches for Approximate Integrated Circuits.

[BibT_eX]

[DOI]

Proceedings of the 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2018

Synthesis of Finite State Machines on Memristor Crossbars.

[BibT_eX]

[DOI]

Proceedings of the 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2018

2017

Towards digital circuit approximation by exploiting fault simulation.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE East-West Design & Test Symposium, 2017

Memristive devices: Technology, design automation and computing frontiers.

[BibT_eX]

[DOI]

Proceedings of the 12th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2017

Towards approximation during test of Integrated Circuits.

[BibT_eX]

[DOI]

Proceedings of the 20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2017

Formal Design Space Exploration for memristor-based crossbar architecture.

[BibT_eX]

[DOI]