Marcello Dalpasso

Orcid: 0000-0002-9242-3435

According to our database1, Marcello Dalpasso authored at least 33 papers between 1992 and 2024.

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Bibliography

2024
Algorithmic strategies for a fast exploration of the TSP 4-OPT neighborhood.
J. Heuristics, August, 2024

2023
Orbits, schemes and dynamic programming procedures for the TSP 4-OPT neighborhood.
CoRR, 2023

2020
Finding the Best 3-OPT Move in Subcubic Time.
Algorithms, 2020

2019
<tt>FASTSET</tt>: A Fast Data Structure for the Representation of Sets of Integers.
Algorithms, 2019

Speeding-Up the Dynamic Programming Procedure for the Edit Distance of Two Strings.
Proceedings of the Database and Expert Systems Applications, 2019

2018
New Modeling Ideas for the Exact Solution of the Closest String Problem.
Proceedings of the Database and Expert Systems Applications, 2018

A Boolean model for delay fault testing of emerging digital technologies based on ambipolar devices.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2016
Boolean and Pseudo-Boolean Test Generation for Feedback Bridging Faults.
IEEE Trans. Computers, 2016

2015
Estimating the strength of poker hands by integer linear programming techniques.
Central Eur. J. Oper. Res., 2015

2014
Efficient testing of multi-output combinational cells in nano-complementary metal oxide semiconductor integrated circuits.
IET Comput. Digit. Tech., 2014

Applications of Boolean Satisfiability to Verification and Testing of Switch-Level Circuits.
J. Electron. Test., 2014

2009
How Many Test Vectors We Need to Detect a Bridging Fault?
J. Electron. Test., 2009

2007
High Quality Test Vectors for Bridging Faults in the Presence of IC's Parameters Variations.
Proceedings of the 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 2007

2005
The String Barcoding Problem is NP-Hard.
Proceedings of the Comparative Genomics, 2005

2002
Bridging fault modeling and simulation for deep submicron CMOS ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002

Virtual Simulation of Distributed IP-Based Designs.
IEEE Des. Test Comput., 2002

An Evolutionary Approach to the Design of On-Chip Pseudorandom Test Pattern Generators.
Proceedings of the 2002 Design, 2002

2000
Virtual Fault Simulation of Distributed IP-Based Designs.
Proceedings of the 2000 Design, 2000

Hardware/software IP protection.
Proceedings of the 37th Conference on Design Automation, 2000

1999
Specification and Validation of Distributed IP-Based Designs with JavaCAD.
Proceedings of the 1999 Design, 1999

1998
A Bist Scheme for Non-Volatile Memories.
J. Electron. Test., 1998

1997
A method for increasing the I<sub>DDQ</sub> testability.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

Symbolic Handling of Bridging Fault Effects.
J. Electron. Test., 1997

1996
Modeling and simulation of broken connections in CMOS IC's.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996

Self-Learning Signature Analysis for Non-Volatile Memory Testing.
Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

1995
Test pattern generation for I<sub>DDQ</sub>: increasing test quality.
Proceedings of the 13th IEEE VLSI Test Symposium (VTS'95), April 30, 1995

Correlation between I<sub>DDQ</sub> testing quality and sensor accuracy.
Proceedings of the 1995 European Design and Test Conference, 1995

1994
Modeling of Broken Connections Faults in CMOS ICs.
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994

1993
Analysis of resistive bridging fault detection in BiCMOS digital ICs.
IEEE Trans. Very Large Scale Integr. Syst., 1993

Fault simulation of parametric bridging faults in CMOS IC's.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993

Analyss of Dynamic Effects of Resistive Bridging Faults in CMOS and BiCMOS Digital ICs.
Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993

1992
Analysis of Steady State Detection of Resistive Bridging Faults in BiCMOS Digital ICs.
Proceedings of the Proceedings IEEE International Test Conference 1992, 1992

Parametric Bridging Fault Characterization for the Fault Simulation of Library-Based ICs.
Proceedings of the Proceedings IEEE International Test Conference 1992, 1992


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