Marcella Carissimi

Orcid: 0000-0003-0928-6095

According to our database1, Marcella Carissimi authored at least 15 papers between 2017 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2024
Drift Compensation in Multilevel PCM for in-Memory Computing Accelerators.
Proceedings of the IEEE International Reliability Physics Symposium, 2024

2023
Combined HW/SW Drift and Variability Mitigation for PCM-Based Analog In-Memory Computing for Neural Network Applications.
IEEE J. Emerg. Sel. Topics Circuits Syst., March, 2023

2022
Phase Change Memories in Smart Sensing Solutions for Structural Health Monitoring.
J. Comput. Civ. Eng., 2022

Phase-change memory cells characterization in an analog in-memory computing perspective.
Proceedings of the 17th Conference on Ph.D Research in Microelectronics and Electronics, 2022

Phase-Change Memory in Neural Network Layers with Measurements-based Device Models.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

An Extended Temperature Range ePCM Memory in 90-nm BCD for Smart Power Applications.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022

An embedded PCM Peripheral Unit adding Analog MAC In-Memory Computing Feature addressing Non-linearity and Time Drift Compensation.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022

2021
Compressed Sensing by Phase Change Memories: Coping with Encoder non-Linearities.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
Power Efficient Sense Amplifier For Emerging Non Volatile Memories.
Proceedings of the 33rd International Conference on VLSI Design and 19th International Conference on Embedded Systems, 2020

2019
Current DAC Based -40dB PSRR Configurable Output LDO in BCD Technology.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

Enhanced Multiple-Output Programmable Current Pulse Generator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2-Mb Embedded Phase Change Memory With 16-ns Read Access Time and 5-Mb/s Write Throughput in 90-nm BCD Technology for Automotive Applications.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019

2018
Row decoder for embedded Phase Change Memory using low voltage transistors.
Microelectron. J., 2018

A 32-KB ePCM for Real-Time Data Processing in Automotive and Smart Power Applications.
IEEE J. Solid State Circuits, 2018

2017
A 32KB 18ns random access time embedded PCM with enhanced program throughput for automotive and smart power applications.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017


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