Marcel J. M. Pelgrom

Orcid: 0000-0002-2747-1190

According to our database1, Marcel J. M. Pelgrom authored at least 11 papers between 1988 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
Multi-Gigahertz Nyquist Analog-to-Digital Converters - Architecture and Circuit Innovations in Deep-Scaled CMOS and FinFET Technologies, 3
Springer, ISBN: 978-3-031-22708-0, 2023

2022
A 28 nm CMOS Triple-Latch Feed-Forward Dynamic Comparator With <27 ps / 1 V and <70 ps / 0.6 V Delay at 5 mV-Sensitivity.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

2020
A 5-GS/s 158.6-mW 9.4-ENOB Passive-Sampling Time-Interleaved Three-Stage Pipelined-SAR ADC With Analog-Digital Corrections in 28-nm CMOS.
IEEE J. Solid State Circuits, 2020

2019
A 5GS/s 158.6mW 12b Passive-Sampling 8×-Interleaved Hybrid ADC with 9.4 ENOB and 160.5dB FoMS in 28nm CMOS.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2010
Energy autonomous sensor systems: Towards a ubiquitous sensor technology.
Microelectron. J., 2010

2006
A Signal-Integrity Self-Test Concept for Debugging Nanometer CMOS ICs.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

1996
BiCMOS and CMOS: a long term relation.
Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996

1995
A 3/5 V compatible I/O buffer.
IEEE J. Solid State Circuits, July, 1995

1994
A 25-Ms/s 8-bit CMOS A/D converter for embedded application.
IEEE J. Solid State Circuits, August, 1994

1989
Matching properties of MOS transistors.
IEEE J. Solid State Circuits, October, 1989

1988
An algorithmic 15-bit CMOS digital-to-analog converter.
IEEE J. Solid State Circuits, December, 1988


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