Marc Tremblay
According to our database1,
Marc Tremblay
authored at least 32 papers
between 1988 and 2020.
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Bibliography
2020
2009
Architecture and Physical Implementation of a Third Generation 65 nm, 16 Core, 32 Thread Chip-Multithreading SPARC Processor.
IEEE J. Solid State Circuits, 2009
Simultaneous speculative threading: a novel pipeline architecture implemented in sun's rock processor.
Proceedings of the 36th International Symposium on Computer Architecture (ISCA 2009), 2009
2008
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
2007
Proceedings of the Twenty-Sixth Annual ACM Symposium on Principles of Distributed Computing, 2007
2006
Proceedings of the 20th Annual International Conference on Supercomputing, 2006
2005
2001
IEEE J. Solid State Circuits, 2001
2000
1998
1997
Real Time Imaging, 1997
1996
1995
IEEE J. Solid State Circuits, November, 1995
Proceedings of the 28th Annual Hawaii International Conference on System Sciences (HICSS-28), 1995
A Fast and Flexible Performance Simulator for Micro-Architecture Trade-off Analysis on UltraSPARC-I.
Proceedings of the 32st Conference on Design Automation, 1995
Proceedings of the COMPCON '95: Technologies for the Information Superhighway, 1995
Proceedings of the COMPCON '95: Technologies for the Information Superhighway, 1995
1994
Medium level scene representation using a VLSI smart hexagonal sensor with multiresolution edge extraction capability and scale space integration processing.
Proceedings of the Conference on Computer Vision and Pattern Recognition, 1994
1993
High resolution smart image sensor with integrated parallel analog processing for multiresolution edge extraction.
Robotics Auton. Syst., 1993
1992
Proceedings of the Visual Information Processing, Orlando, FL, USA, April 20, 1992, 1992
A VLSI Implementation Of A Light Sensor With Imbedded Focal Plane Processing Capabilities.
Proceedings of the IEEE/RSJ International Conference on Intelligent Robots and Systems, 1992
1991
Proceedings of the Pattern Recognition: Architectures, Algorithms and Applications, 1991
The UCLA Mirror Processor: A Building Block for Self-Checking Self-Repring Computing Nodes.
Proceedings of the 1991 International Symposium on Fault-Tolerant Computing, 1991
1990
IEEE Trans. Computers, 1990
MAR: an integrated system for focal plane edge tracking with parallel analog processing and built-in primitives for image acquisition and analysis.
Proceedings of the 10th IAPR International Conference on Pattern Recognition, 1990
1988
Proceedings of the Eighteenth International Symposium on Fault-Tolerant Computing, 1988