Marc Hutner

According to our database, Marc Hutner authored at least 5 papers between 2018 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

Applying Universal Chip Telemetry to Detect Latent Defects and Aging in Advanced Electronics.

Evelyn Landman, Alex Burlak, C. Nir Sever, Marc Hutner

Proceedings of the IEEE International Reliability Physics Symposium, 2022

2021

The Advancement of 1149.10.

Yu Huang, Haitao Fu, Bin Deng, Edward Seng, Marc Hutner, Jean-Francois Cote, Geir Eide

Proceedings of the IEEE International Test Conference in Asia, 2021

2020

Special Session: Test Challenges in a Chiplet Marketplace.

Marc Hutner, R. Sethuram, Bapi Vinnakota, Dave Armstrong, A. Copperhall

Proceedings of the 38th IEEE VLSI Test Symposium, 2020

2019

Innovative Practices on In-System Test and Reliability of Memories.

S. Bandyopadhyay, J. Mekkoth, Marc Hutner, Hayk T. Grigoryan, Arun Kumar, Samvel K. Shoukourian, Grigor Tshagharyan, Yervant Zorian, Gabriele Boschi, Duccio Lazzarotti, Donato Luongo, Hanna Shaheen, Gurgen Harutyunyan

Proceedings of the 37th IEEE VLSI Test Symposium, 2019

2018

Special session on machine learning: How will machine learning transform test?

Yiorgos Makris, Amit Nahar, Haralampos-G. D. Stratigopoulos, Marc Hutner

Proceedings of the 36th IEEE VLSI Test Symposium, 2018