Marc Herbstritt

Orcid: 0000-0002-1660-5720

Affiliations:
  • Albert Ludwigs University of Freiburg, IT Services, Germany
  • Albert Ludwigs University of Freiburg, Centre for Security and Society, Germany (former)
  • Schloss Dagstuhl - Leibniz Center for Informatics, Wadern, Germany (former)
  • Albert Ludwigs University of Freiburg, Institute of Computer Science, Germany (former, PhD 2008)


According to our database1, Marc Herbstritt authored at least 27 papers between 1999 and 2014.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2014
Der h2-lndex: Zur vermessenen Vermessung der wissenschaftlichen Welt.
Proceedings of the Aspekte der Technischen Informatik, 2014

2012
Publication Culture in Computing Research (Dagstuhl Perspectives Workshop 12452).
Dagstuhl Reports, 2012

2009
Compositional Dependability Evaluation for STATEMATE.
IEEE Trans. Software Eng., 2009

Satisfiability and Verification - From Core Algorithms to Novel Application Domains.
Südwestdeutscher Verlag für Hochschulschriften, ISBN: 978-3-8381-0102-6, 2009

2008
SAT-based verification: from core algorithms to novel application domains.
PhD thesis, 2008

The Demand for Reliability in Probabilistic Verification.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2008

Propositional approximations for bounded model checking of partial circuit designs.
Proceedings of the 26th International Conference on Computer Design, 2008

Probabilistic Model Checking and Reliability of Results.
Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008

2007
Application of Lifting in Partial Design Analysis.
Proceedings of the Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), 2007

Forwarding, Splitting, and Block Ordering to Optimize BDD-based Bisimulation Computation.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2007

Optimization techniques for BDD-based bisimulation computation.
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007

On Combining 01X-Logic and QBF.
Proceedings of the Computer Aided Systems Theory, 2007

On Variable Selection in SAT-LP-based Bounded Model Checking of Linear Hybrid Automata.
Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), 2007

2006
Bounded Model Checking with Parametric Data Structures.
Proceedings of the Fourth International Workshop on Bounded Model Checking, 2006

Compositional Performability Evaluation for STATEMATE.
Proceedings of the Third International Conference on the Quantitative Evaluation of Systems (QEST 2006), 2006

Advanced SAT-Techniques for Bounded Model Checking of Blackbox Designs.
Proceedings of the Seventh International Workshop on Microprocessor Test and Verification (MTV 2006), 2006

Memory-aware Bounded Model Checking for Linear Hybrid Systems.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2006

Minimization of Large State Spaces using Symbolic Branching Bisimulation.
Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

Sigref- A Symbolic Bisimulation Tool Box.
Proceedings of the Automated Technology for Verification and Analysis, 2006

2005
On SAT-based Bounded Invariant Checking of Blackbox Designs.
Proceedings of the Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), 2005

2004
On the Impact of Structural Circuit Partitioning on SAT-Based Combinational Circuit Verification.
Proceedings of the Fifth International Workshop on Microprocessor Test and Verification (MTV 2004), 2004

Bounded Model Checking and Inductive Verification of Hybrid Discrete-continuous Systems.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2004

2003
Conflict-Based Selection of Branching Rules.
Proceedings of the Theory and Applications of Satisfiability Testing, 2003

Conflict-based Selection of Branching Rules in SAT-Algorithms.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2003

2001
Don't Care Minimization of BMDs: Complexity and Algorithms.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2001

Exploiting don't cares to minimize *BMDs.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

1999
Grouping Heuristics for Word-Level Decision Diagrams.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 1999


  Loading...