Marc Duranton
Orcid: 0000-0003-3762-264X
According to our database1,
Marc Duranton
authored at least 31 papers
between 1992 and 2024.
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Bibliography
2024
Design Space Exploration of HPC Systems with Random Forest-based Bayesian Optimization.
Proceedings of the 16th Workshop on Rapid Simulation and Performance Evaluation for Design, 2024
2023
Improving Normalizing Flows with the Approximate Mass for Out-of-Distribution Detection.
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2023
2021
Proceedings of the 51st IEEE European Solid-State Device Research Conference, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
2019
A 5500-frames/s 85-GOPS/W 3-D Stacked BSI Vision Chip Based on Parallel In-Focal-Plane Acquisition and Processing.
IEEE J. Solid State Circuits, 2019
2018
A 5500FPS 85GOPS/W 3D Stacked BSI Vision Chip Based on Parallel in-Focal-Plane Acquisition and Processing.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018
2016
J. Electronic Imaging, 2016
2015
Proceedings of the VISAPP 2015, 2015
Proceedings of the 9th International Conference on Distributed Smart Camera, 2015
2014
ACM Trans. Archit. Code Optim., 2014
Proceedings of the 17th International Conference on Information Fusion, 2014
The improbable but highly appropriate marriage of 3D stacking and neuromorphic accelerators.
Proceedings of the 2014 International Conference on Compilers, 2014
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014
2012
Balancing Programmability and Silicon Efficiency of Heterogeneous Multicore Architectures.
ACM Trans. Embed. Comput. Syst., 2012
BenchNN: On the broad potential application scope of hardware neural network accelerators.
Proceedings of the 2012 IEEE International Symposium on Workload Characterization, 2012
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
2011
Int. J. Parallel Program., 2011
2010
ERBIUM: a deterministic, concurrent intermediate representation for portable and scalable performance.
Proceedings of the 7th Conference on Computing Frontiers, 2010
Erbium: a deterministic, concurrent intermediate representation to map data-flow tasks to scalable, persistent streaming processes.
Proceedings of the 2010 International Conference on Compilers, 2010
2008
A Time-Consistent Video Segmentation Algorithm Designed for Real-Time Implementation.
VLSI Design, 2008
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008
2007
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007
2006
<i>N</i>-synchronous Kahn networks: a relaxed model of synchrony for real-time systems.
Proceedings of the 33rd ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, 2006
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006
2005
2003
Proceedings of the 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), 2003
2002
Multi-periodic Process Networks: Prototyping and Verifying Stream-Processing Systems.
Proceedings of the Euro-Par 2002, 2002
1996
1992
IEEE Trans. Neural Networks, 1992