Marc Casas

According to our database, Marc Casas authored at least 112 papers between 2007 and 2024.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of three.

2024

Practically Tackling Memory Bottlenecks of Graph-Processing Workloads.

Alexandre Valentin Jamet, Georgios Vavouliotis, Daniel A. Jiménez, Lluc Alvarez, Marc Casas

Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2024

Exploiting Vector Code Semantics for Efficient Data Cache Prefetching.

Francesc Martínez Palau, Martí Torrents, Adrià Armejach, Marc Casas

Proceedings of the 38th ACM International Conference on Supercomputing, 2024

Extending Sparse Patterns to Improve Inverse Preconditioning on GPU Architectures.

Sergi Laut, Ricard Borrell, Marc Casas

Proceedings of the 33rd International Symposium on High-Performance Parallel and Distributed Computing, 2024

A Two Level Neural Approach Combining Off-Chip Prediction with Adaptive Prefetch Filtering.

Alexandre Valentin Jamet, Georgios Vavouliotis, Daniel A. Jiménez, Lluc Alvarez, Marc Casas

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024

2023

HPCG on long-vector architectures: Evaluation and optimization on NEC SX-Aurora and RISC-V.

Constantino Gómez, Filippo Mantovani, Erich Focht, Marc Casas

Future Gener. Comput. Syst., June, 2023

Compressed Real Numbers for AI: a case-study using a RISC-V CPU.

Federico Rossi, Marco Cococcioni, Roger Ferrer Ibáñez, Jesús Labarta, Filippo Mantovani, Marc Casas, Emanuele Ruffaldi, Sergio Saponara

CoRR, 2023

Open-Source GEMM Hardware Kernels Generator: Toward Numerically-Tailored Computations.

Louis Ledoux, Marc Casas

CoRR, 2023

Characterizing the impact of last-level cache replacement policies on big-data workloads.

Alexandre Valentin Jamet, Lluc Alvarez, Marc Casas

CoRR, 2023

Optimization of SpGEMM with Risc-V vector instructions.

Valentin Le Fèvre, Marc Casas

CoRR, 2023

Efficient Direct Convolution Using Long SIMD Instructions.

Alexandre de Limas Santana, Adrià Armejach, Marc Casas

Proceedings of the 28th ACM SIGPLAN Annual Symposium on Principles and Practice of Parallel Programming, 2023

Efficient Execution of SpGEMM on Long Vector Architectures.

Valentin Le Fèvre, Marc Casas

Proceedings of the 32nd International Symposium on High-Performance Parallel and Distributed Computing, 2023

An Open-Source Framework for Efficient Numerically-Tailored Computations.

Louis Ledoux, Marc Casas

Proceedings of the 33rd International Conference on Field-Programmable Logic and Applications, 2023

2022

Compiler-Assisted Compaction/Restoration of SIMD Instructions.

Juan M. Cebrian, Thibaud Balem, Adrián Barredo, Marc Casas, Miquel Moretó, Alberto Ros, Alexandra Jimborean

IEEE Trans. Parallel Distributed Syst., 2022

A BF16 FMA is All You Need for DNN Training.

John Osorio Ríos, Adrià Armejach, Eric Petit, Greg Henry, Marc Casas

IEEE Trans. Emerg. Top. Comput., 2022

Optimization of the Sparse Multi-Threaded Cholesky Factorization for A64FX.

Valentin Le Fèvre, Tetsuzo Usui, Marc Casas

CoRR, 2022

TD-NUCA: Runtime Driven Management of NUCA Caches in Task Dataflow Programming Models.

Paul Caheny, Lluc Alvarez, Marc Casas, Miquel Moretó

Proceedings of the SC22: International Conference for High Performance Computing, 2022

FASE: A Fast, Accurate and Seamless Emulator for Custom Numerical Formats.

John Osorio Ríos, Adrià Armejach, Eric Petit, Greg Henry, Marc Casas

Proceedings of the Machine Learning and Knowledge Discovery in Databases, 2022

Page Size Aware Cache Prefetching.

Georgios Vavouliotis, Gino Chacon, Lluc Alvarez, Paul V. Gratz, Daniel A. Jiménez, Marc Casas

Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022

Task-based Acceleration of Bidirectional Recurrent Neural Networks on Multi-core Architectures.

Robin Kumar Sharma, Marc Casas

Proceedings of the 2022 IEEE International Parallel and Distributed Processing Symposium, 2022

Communication-aware Sparse Patterns for the Factorized Approximate Inverse Preconditioner.

Sergi Laut, Marc Casas, Ricard Borrell

Proceedings of the HPDC '22: The 31st International Symposium on High-Performance Parallel and Distributed Computing, Minneapolis, MN, USA, 27 June 2022, 2022

A Generator of Numerically-Tailored and High-Throughput Accelerators for Batched GEMMs.

Louis Ledoux, Marc Casas

Proceedings of the 30th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2022

A Selective Nesting Approach for the Sparse Multi-threaded Cholesky Factorization.

Valentin Le Fèvre, Tetsuzo Usui, Marc Casas

Proceedings of the 7th IEEE/ACM International Workshop on Extreme Scale Programming Models and Middleware, 2022

2021

Intelligent Adaptation of Hardware Knobs for Improving Performance and Power Consumption.

Cristobal Ortega, Lluc Alvarez, Marc Casas, Ramon Bertran, Alper Buyuktosunoglu, Alexandre E. Eichenberger, Pradip Bose, Miquel Moretó

IEEE Trans. Computers, 2021

Efficiently running SpMV on long vector architectures.

Constantino Gómez, Filippo Mantovani, Erich Focht, Marc Casas

Proceedings of the PPoPP '21: 26th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2021

Multilevel simulation-based co-design of next generation HPC microprocessors.

Lilia Zaourar, Mohamed Benazouz, Ayoub Mouhagir, Fatma Jebali, Tanguy Sassolas, Jean-Christophe Weill, Carlos Falquez, Nam Ho, Dirk Pleiter, Antoni Portero, Estela Suarez, Polydoros Petrakis, Vassilis Papaefstathiou, Manolis Marazakis, Milan Radulovic, Francesc Martínez, Adrià Armejach, Marc Casas, Alejandro Nocua, Romain Dolbeau

Proceedings of the 2021 International Workshop on Performance Modeling, 2021

Morrigan: A Composite Instruction TLB Prefetcher.

Georgios Vavouliotis, Lluc Alvarez, Boris Grot, Daniel A. Jiménez, Marc Casas

Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021

Exploiting Page Table Locality for Agile TLB Prefetching.

Georgios Vavouliotis, Lluc Alvarez, Vasileios Karakostas, Konstantinos Nikas, Nectarios Koziris, Daniel A. Jiménez, Marc Casas

Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021

Dynamically Adapting Floating-Point Precision to Accelerate Deep Neural Network Training.

John Osorio Ríos, Adrià Armejach, Eric Petit, Greg Henry, Marc Casas

Proceedings of the 20th IEEE International Conference on Machine Learning and Applications, 2021

Cache-aware Sparse Patterns for the Factorized Sparse Approximate Inverse Preconditioner.

Sergi Laut, Ricard Borrell, Marc Casas

Proceedings of the HPDC '21: The 30th International Symposium on High-Performance Parallel and Distributed Computing, 2021

PrioRAT: Criticality-Driven Prioritization Inside the On-Chip Memory Hierarchy.

Vladimir Dimic, Miquel Moretó, Marc Casas, Mateo Valero

Proceedings of the Euro-Par 2021: Parallel Processing, 2021

2020

Efficiency analysis of modern vector architectures: vector ALU sizes, core counts and clock frequencies.

Adrián Barredo, Juan M. Cebrian, Mateo Valero, Marc Casas, Miquel Moretó

J. Supercomput., 2020

Iteration-fusing conjugate gradient for sparse linear systems with MPI + OmpSs.

Maria Barreda, José Ignacio Aliaga, Vicenç Beltran, Marc Casas

J. Supercomput., 2020

Using Arm's scalable vector extension on stencil codes.

Adrià Armejach, Helena Caminal, Juan M. Cebrian, Rubén Langarita, Rekai González-Alberquilla, Chris Adeniyi-Jones, Mateo Valero, Marc Casas, Miquel Moretó

J. Supercomput., 2020

Semi-automatic validation of cycle-accurate simulation infrastructures: The case for gem5-x86.

Juan M. Cebrian, Adrián Barredo, Helena Caminal, Miquel Moretó, Marc Casas, Mateo Valero

Future Gener. Comput. Syst., 2020

Generating Efficient DNN-Ensembles with Evolutionary Computation.

Marc Ortiz, Florian Scheidegger, Marc Casas, A. Cristiano I. Malossi, Eduard Ayguadé

CoRR, 2020

Reducing Data Motion to Accelerate the Training of Deep Neural Networks.

Sicong Zhuang, A. Cristiano I. Malossi, Marc Casas

CoRR, 2020

Runtime-guided ECC protection using online estimation of memory vulnerability.

Luc Jaulmes, Miquel Moretó, Mateo Valero, Mattan Erez, Marc Casas

Proceedings of the International Conference for High Performance Computing, 2020

Cost-aware prediction of uncorrected DRAM errors in the field.

Isaac Boixaderas, Darko Zivanovic, Sergi Moré, Javier Bartolome, David Vicente, Marc Casas, Paul M. Carpenter, Petar Radojkovic, Eduard Ayguadé

Proceedings of the International Conference for High Performance Computing, 2020

Characterizing the impact of last-level cache replacement policies on big-data workloads.

Alexandre Valentin Jamet, Lluc Alvarez, Daniel A. Jiménez, Marc Casas

Proceedings of the IEEE International Symposium on Workload Characterization, 2020

Wavefront parallelization of recurrent neural networks on multi-core architectures.

Robin Kumar Sharma, Marc Casas

Proceedings of the ICS '20: 2020 International Conference on Supercomputing, 2020

RICH: implementing reductions in the cache hierarchy.

Vladimir Dimic, Miquel Moretó, Marc Casas, Jan Ciesko, Mateo Valero

Proceedings of the ICS '20: 2020 International Conference on Supercomputing, 2020

Modeling and optimizing NUMA effects and prefetching with machine learning.

Isaac Sánchez Barrera, David Black-Schaffer, Marc Casas, Miquel Moretó, Anastasiia Stupnikova, Mihail Popov

Proceedings of the ICS '20: 2020 International Conference on Supercomputing, 2020

Evaluating Mixed-Precision Arithmetic for 3D Generative Adversarial Networks to Simulate High Energy Physics Detectors.

John Osorio Ríos, Adrià Armejach, Gulrukh Khattak, Eric Petit, Sofia Vallecorsa, Marc Casas

Proceedings of the 19th IEEE International Conference on Machine Learning and Applications, 2020

Improving Predication Efficiency through Compaction/Restoration of SIMD Instructions.

Adrián Barredo, Juan M. Cebrian, Miquel Moretó, Marc Casas, Mateo Valero

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020

2019

Design trade-offs for emerging HPC processors based on mobile market technology.

Adrià Armejach, Marc Casas, Miquel Moretó

J. Supercomput., 2019

Sampled Simulation of Task-Based Programs.

Thomas Grass, Trevor E. Carlson, Alejandro Rico, Germán Ceballos, Eduard Ayguadé, Marc Casas, Miquel Moretó

IEEE Trans. Computers, 2019

Special issue on the message passing interface.

Pavan Balaji, Marc Casas

Parallel Comput., 2019

On the maturity of parallel applications for asymmetric multi-core processors.

Kallia Chronaki, Miquel Moretó, Marc Casas, Alejandro Rico, Rosa M. Badia, Eduard Ayguadé, Mateo Valero

J. Parallel Distributed Comput., 2019

Resilient gossip-inspired all-reduce algorithms for high-performance computing: Potential, limitations, and open questions.

Marc Casas, Wilfried N. Gansterer, Elias Wimmer

Int. J. High Perform. Comput. Appl., 2019

Optimizing computation-communication overlap in asynchronous task-based programs: poster.

Emilio Castillo, Nikhil Jain, Marc Casas, Miquel Moretó, Martin Schulz, Ramón Beivide, Mateo Valero, Abhinav Bhatele

Proceedings of the 24th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2019

On the Benefits of Tasking with OpenMP.

Alejandro Rico, Isaac Sánchez Barrera, José A. Joao, Joshua Randall, Marc Casas, Miquel Moretó

Proceedings of the OpenMP: Conquering the Full Hardware Spectrum, 2019

Design Space Exploration of Next-Generation HPC Machines.

Constantino Gómez, Francesc Martínez, Adrià Armejach, Miquel Moretó, Filippo Mantovani, Marc Casas

Proceedings of the 2019 IEEE International Parallel and Distributed Processing Symposium, 2019

A Vulnerability Factor for ECC-protected Memory.

Luc Jaulmes, Miquel Moretó, Mateo Valero, Marc Casas

Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019

Open-Source Shared Memory implementation of the HPCG benchmark: analysis, improvements and evaluation on Cavium ThunderX2.

Daniel Ruiz, Filippo Spiga, Marc Casas, Marta Garcia-Gasulla, Filippo Mantovani

Proceedings of the 17th International Conference on High Performance Computing & Simulation, 2019

Power efficient job scheduling by predicting the impact of processor manufacturing variability.

Dimitrios Chasapis, Miquel Moretó, Martin Schulz, Barry Rountree, Mateo Valero, Marc Casas

Proceedings of the ACM International Conference on Supercomputing, 2019

Optimizing computation-communication overlap in asynchronous task-based programs.

Emilio Castillo, Nikhil Jain, Marc Casas, Miquel Moretó, Martin Schulz, Ramón Beivide, Mateo Valero, Abhinav Bhatele

Proceedings of the ACM International Conference on Supercomputing, 2019

Convolutional Neural Network Training with Dynamic Epoch Ordering.

Ferran Plana Rius, Cecilio Angulo Bahón, Marc Casas, Josep Maria Mirats Tur

Proceedings of the Artificial Intelligence Research and Development, 2019

POSTER: An Optimized Predication Execution for SIMD Extensions.

Adrián Barredo, Juan M. Cebrian, Miquel Moretó, Marc Casas, Mateo Valero

Proceedings of the 28th International Conference on Parallel Architectures and Compilation Techniques, 2019

2018

Asynchronous and Exact Forward Recovery for Detected Errors in Iterative Solvers.

Luc Jaulmes, Miquel Moretó, Eduard Ayguadé, Jesús Labarta, Mateo Valero, Marc Casas

IEEE Trans. Parallel Distributed Syst., 2018

Reducing Cache Coherence Traffic with a NUMA-Aware Runtime Approach.

Paul Caheny, Lluc Alvarez, Said Derradji, Mateo Valero, Miquel Moretó, Marc Casas

IEEE Trans. Parallel Distributed Syst., 2018

Performance and energy effects on task-based parallelized applications - User-directed versus manual vectorization.

Helena Caminal, Diego Caballero, Juan M. Cebrian, Roger Ferrer, Marc Casas, Miquel Moretó, Xavier Martorell, Mateo Valero

J. Supercomput., 2018

Memory Vulnerability: A Case for Delaying Error Reporting.

Luc Jaulmes, Miquel Moretó, Mateo Valero, Marc Casas

CoRR, 2018

Low-Precision Floating-Point Schemes for Neural Network Training.

Marc Ortiz, Adrián Cristal, Eduard Ayguadé, Marc Casas

CoRR, 2018

TaskGenX: A Hardware-Software Proposal for Accelerating Task Parallelism.

Kallia Chronaki, Marc Casas, Miquel Moretó, Jaume Bosch, Rosa M. Badia

Proceedings of the High Performance Computing - 33rd International Conference, 2018

Approximating a Multi-Grid Solver.

Valentin Le Fèvre, Leonardo Bautista-Gomez, Osman S. Unsal, Marc Casas

Proceedings of the 2018 IEEE/ACM Performance Modeling, 2018

Runtime-assisted cache coherence deactivation in task parallel programs.

Paul Caheny, Lluc Alvarez, Mateo Valero, Miquel Moretó, Marc Casas

Proceedings of the International Conference for High Performance Computing, 2018

Graph partitioning applied to DAG scheduling to reduce NUMA effects.

Isaac Sánchez Barrera, Marc Casas, Miquel Moretó, Eduard Ayguadé, Jesús Labarta, Mateo Valero

Proceedings of the 23rd ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2018

Data Prefetching on In-order Processors.

Cristobal Ortega, Victor Garcia, Miquel Moretó, Marc Casas, Roxana Rusitoru

Proceedings of the 2018 International Conference on High Performance Computing & Simulation, 2018

Reducing Data Movement on Large Shared Memory Systems by Exploiting Computation Dependencies.

Isaac Sánchez Barrera, Miquel Moretó, Eduard Ayguadé, Jesús Labarta, Mateo Valero, Marc Casas

Proceedings of the 32nd International Conference on Supercomputing, 2018

Runtime-Guided Management of Stacked DRAM Memories in Task Parallel Programs.

Lluc Alvarez, Marc Casas, Jesús Labarta, Eduard Ayguadé, Mateo Valero, Miquel Moretó

Proceedings of the 32nd International Conference on Supercomputing, 2018

Architectural Support for Task Dependence Management with Flexible Software Scheduling.

Emilio Castillo, Lluc Alvarez, Miquel Moretó, Marc Casas, Enrique Vallejo, José Luis Bosque, Ramón Beivide, Mateo Valero

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018

Stencil codes on a vector length agnostic architecture.

Adrià Armejach, Helena Caminal, Juan M. Cebrian, Rekai González-Alberquilla, Chris Adeniyi-Jones, Mateo Valero, Marc Casas, Miquel Moretó

Proceedings of the 27th International Conference on Parallel Architectures and Compilation Techniques, 2018

2017

Task Scheduling Techniques for Asymmetric Multi-Core Systems.

Kallia Chronaki, Alejandro Rico, Marc Casas, Miquel Moretó, Rosa M. Badia, Eduard Ayguadé, Jesús Labarta, Mateo Valero

IEEE Trans. Parallel Distributed Syst., 2017

Prediction of the impact of network switch utilization on application performance via active measurement.

Marc Casas, Greg Bronevetsky

Parallel Comput., 2017

iQ: An Efficient and Flexible Queue-Based Simulation Framework.

Damian Roca, Daniel Nemirovsky, Marc Casas, Miquel Moretó, Mateo Valero, Mario Nemirovsky

Proceedings of the 25th IEEE International Symposium on Modeling, 2017

ATM: Approximate Task Memoization in the Runtime System.

Iulian Brumar, Marc Casas, Miquel Moretó, Mateo Valero, Gurindar S. Sohi

Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium, 2017

Iteration-fusing conjugate gradient.

Sicong Zhuang, Marc Casas

Proceedings of the International Conference on Supercomputing, 2017

libPRISM: an intelligent adaptation of prefetch and SMT levels.

Cristobal Ortega, Miquel Moretó, Marc Casas, Ramon Bertran, Alper Buyuktosunoglu, Alexandre E. Eichenberger, Pradip Bose

Proceedings of the International Conference on Supercomputing, 2017

Evaluating Scientific Workflow Execution on an Asymmetric Multicore Processor.

Ilia Pietri, Sicong Zhuang, Marc Casas, Miquel Moretó, Rizos Sakellariou

Proceedings of the Euro-Par 2017: Parallel Processing Workshops, 2017

Runtime-Assisted Shared Cache Insertion Policies Based on Re-reference Intervals.

Vladimir Dimic, Miquel Moretó, Marc Casas, Mateo Valero

Proceedings of the Euro-Par 2017: Parallel Processing - 23rd International Conference on Parallel and Distributed Computing, Santiago de Compostela, Spain, August 28, 2017

2016

Evaluation of HPC Applications' Memory Resource Consumption via Active Measurement.

Marc Casas, Greg Bronevetsky

IEEE Trans. Parallel Distributed Syst., 2016

PARSECSs: Evaluating the Impact of Task Parallelism in the PARSEC Benchmark Suite.

Dimitrios Chasapis, Marc Casas, Miquel Moretó, Raul Vidal, Eduard Ayguadé, Jesús Labarta, Mateo Valero

ACM Trans. Archit. Code Optim., 2016

MUSA: a multi-level simulation approach for next-generation HPC machines.

Thomas Grass, César Allande, Adrià Armejach, Alejandro Rico, Eduard Ayguadé, Jesús Labarta, Mateo Valero, Marc Casas, Miquel Moretó

Proceedings of the International Conference for High Performance Computing, 2016

TaskPoint: Sampled simulation of task-based programs.

Thomas Grass, Alejandro Rico, Marc Casas, Miquel Moretó, Eduard Ayguadé

Proceedings of the 2016 IEEE International Symposium on Performance Analysis of Systems and Software, 2016

CATA: Criticality Aware Task Acceleration for Multicore Processors.

Emilio Castillo, Miquel Moretó, Marc Casas, Lluc Alvarez, Enrique Vallejo, Kallia Chronaki, Rosa M. Badia, José Luis Bosque, Ramón Beivide, Eduard Ayguadé, Jesús Labarta, Mateo Valero

Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium, 2016

Runtime-Guided Mitigation of Manufacturing Variability in Power-Constrained Multi-Socket NUMA Nodes.

Dimitrios Chasapis, Marc Casas, Miquel Moretó, Martin Schulz, Eduard Ayguadé, Jesús Labarta, Mateo Valero

Proceedings of the 2016 International Conference on Supercomputing, 2016

POSTER: Exploiting Asymmetric Multi-Core Processors with Flexible System Sofware.

Kallia Chronaki, Miquel Moretó, Marc Casas, Alejandro Rico, Rosa M. Badia, Eduard Ayguadé, Jesús Labarta, Mateo Valero

Proceedings of the 2016 International Conference on Parallel Architectures and Compilation, 2016

Reducing Cache Coherence Traffic with Hierarchical Directory Cache and NUMA-Aware Runtime Scheduling.

Paul Caheny, Marc Casas, Miquel Moretó, Hervé Gloaguen, Maxime Saintes, Eduard Ayguadé, Jesús Labarta, Mateo Valero

Proceedings of the 2016 International Conference on Parallel Architectures and Compilation, 2016

2015

A framework for evaluating comprehensive fault resilience mechanisms in numerical programs.

Sui Chen, Greg Bronevetsky, Bin Li, Marc Casas-Guix, Lu Peng

J. Supercomput., 2015

Adaptive and application dependent runtime guided hardware prefetcher reconfiguration on the IBM POWER7.

David Prat, Cristobal Ortega, Marc Casas, Miquel Moretó, Mateo Valero

CoRR, 2015

Exploiting asynchrony from exact forward recovery for DUE in iterative solvers.

Luc Jaulmes, Marc Casas, Miquel Moretó, Eduard Ayguadé, Jesús Labarta, Mateo Valero

Proceedings of the International Conference for High Performance Computing, 2015

Evaluating the Impact of OpenMP 4.0 Extensions on Relevant Parallel Workloads.

Raul Vidal, Marc Casas, Miquel Moretó, Dimitrios Chasapis, Roger Ferrer, Xavier Martorell, Eduard Ayguadé, Jesús Labarta, Mateo Valero

Proceedings of the OpenMP: Heterogenous Execution and Data Movements, 2015

Coherence protocol for transparent management of scratchpad memories in shared memory manycore architectures.

Lluc Alvarez, Lluís Vilanova, Miquel Moretó, Marc Casas, Marc González, Xavier Martorell, Nacho Navarro, Eduard Ayguadé, Mateo Valero

Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015

Runtime-Aware Architectures.

Marc Casas, Miquel Moretó, Lluc Alvarez, Emilio Castillo, Dimitrios Chasapis, Timothy Hayes, Luc Jaulmes, Oscar Palomar, Osman S. Unsal, Adrián Cristal, Eduard Ayguadé, Jesús Labarta, Mateo Valero

Proceedings of the Euro-Par 2015: Parallel Processing, 2015

Runtime-Guided Management of Scratchpad Memories in Multicore Architectures.

Lluc Alvarez, Miquel Moretó, Marc Casas, Emilio Castillo, Xavier Martorell, Jesús Labarta, Eduard Ayguadé, Mateo Valero

Proceedings of the 2015 International Conference on Parallel Architectures and Compilation, 2015

2014

Runtime-Aware Architectures: A First Approach.

Mateo Valero, Miquel Moretó, Marc Casas, Eduard Ayguadé, Jesús Labarta

Supercomput. Front. Innov., 2014

Active Measurement of Memory Resource Consumption.

Marc Casas, Greg Bronevetsky

Proceedings of the 2014 IEEE 28th International Parallel and Distributed Processing Symposium, 2014

Active Measurement of the Impact of Network Switch Utilization on Application Performance.

Marc Casas, Greg Bronevetsky

Proceedings of the 2014 IEEE 28th International Parallel and Distributed Processing Symposium, 2014

Evaluating Execution Time Predictability of Task-Based Programs on Multi-Core Processors.

Thomas Grass, Alejandro Rico, Marc Casas, Miquel Moretó, Alex Ramírez

Proceedings of the Euro-Par 2014: Parallel Processing Workshops, 2014

2013

Performance Analysis Techniques for the Exascale Co-Design Process.

Martin Schulz, James F. Belak, Abhinav Bhatele, Peer-Timo Bremer, Greg Bronevetsky, Marc Casas, Todd Gamblin, Katherine E. Isaacs, Ignacio Laguna, Joshua A. Levine, Valerio Pascucci, David F. Richards, Barry Rountree

Proceedings of the Parallel Computing: Accelerating Computational Science and Engineering (CSE), 2013

2012

Poster: Autonomic Modeling of Data-Driven Application Behavior.

Steena D. S. Monteiro, Greg Bronevetsky, Marc Casas-Guix

Proceedings of the 2012 SC Companion: High Performance Computing, 2012

Abstract: Autonomic Modeling of Data-Driven Application Behavior.

Steena D. S. Monteiro, Greg Bronevetsky, Marc Casas-Guix

Proceedings of the 2012 SC Companion: High Performance Computing, 2012

Fault resilience of the algebraic multi-grid solver.

Marc Casas-Guix, Bronis R. de Supinski, Greg Bronevetsky, Martin Schulz

Proceedings of the International Conference on Supercomputing, 2012

2011

Simulating Whole Supercomputer Applications.

Juan Gonzalez, Judit Giménez, Marc Casas, Miquel Moretó, Alex Ramírez, Jesús Labarta, Mateo Valero

IEEE Micro, 2011

Extracting the optimal sampling frequency of applications using spectral analysis.

Marc Casas, Harald Servat, Rosa M. Badia, Jesús Labarta

Concurr. Comput. Pract. Exp., 2011

Trace Spectral Analysis toward Dynamic Levels of Detail.

Germán Llort, Marc Casas, Harald Servat, Kevin A. Huck, Judit Giménez, Jesús Labarta

Proceedings of the 17th IEEE International Conference on Parallel and Distributed Systems, 2011

2010

Spectral analysis of executions of computer programs and its applications on performance analysis.

Marc Casas

PhD thesis, 2010

Automatic Phase Detection and Structure Extraction of MPI Applications.

Marc Casas, Rosa M. Badia, Jesús Labarta

Int. J. High Perform. Comput. Appl., 2010

2008

Automatic analysis of speedup of MPI applications.

Marc Casas, Rosa M. Badia, Jesús Labarta

Proceedings of the 22nd Annual International Conference on Supercomputing, 2008

Prediction of behavior of MPI applications.

Marc Casas, Rosa M. Badia, Jesús Labarta

Proceedings of the 2008 IEEE International Conference on Cluster Computing, 29 September, 2008

2007

Automatic Phase Detection of MPI Applications.

Marc Casas, Rosa M. Badia, Jesús Labarta

Proceedings of the Parallel Computing: Architectures, 2007

Automatic Structure Extraction from MPI Applications Tracefiles.

Marc Casas, Rosa M. Badia, Jesús Labarta

Proceedings of the Euro-Par 2007, 2007