Manthena Vamshi Krishna

According to our database, Manthena Vamshi Krishna authored at least 7 papers between 2010 and 2014.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2014

A 1V 2mW 17GHz multi-modulus frequency divider based on TSPC logic using 65nm CMOS.

Manthena Vamshi Krishna, Anil Jain, Nasir Abdul Quadir, Paul D. Townsend, Peter Ossieur

Proceedings of the ESSCIRC 2014, 2014

2012

A Low-Power Single-Phase Clock Multiband Flexible Divider.

Manthena Vamshi Krishna, Manh Anh Do, Chirn Chye Boon, Kiat Seng Yeo

IEEE Trans. Very Large Scale Integr. Syst., 2012

A low power low phase noise dual-band multiphase VCO.

Juan Xie, Manthena Vamshi Krishna, Manh Anh Do, Chirn Chye Boon, Kiat Seng Yeo

Microelectron. J., 2012

2010

Design and Analysis of Ultra Low Power True Single Phase Clock CMOS 2/3 Prescaler.

Manthena Vamshi Krishna, Manh Anh Do, Kiat Seng Yeo, Chirn Chye Boon, Wei Meng Lim

IEEE Trans. Circuits Syst. I Regul. Pap., 2010

A 1.8-V 3.6-mW 2.4-GHz fully integrated CMOS frequency synthesizer for IEEE 802.15.4.

Manthena Vamshi Krishna, Juan Xie, Manh Anh Do, Chirn Chye Boon, Kiat Seng Yeo, Aaron V. T. Do

Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010

A 1.8-V 3.6-mW 2.4-GHz Fully Integrated CMOS Frequency Synthesizer for the IEEE 802.15.4.

Manthena Vamshi Krishna, Xuan Jie, Manh Anh Do, Chirn Chye Boon, Kiat Seng Yeo, Aaron V. T. Do

Proceedings of the VLSI-SoC: Forward-Looking Trends in IC and Systems Design, 2010

A 1-V CMOS Ultralow-Power Receiver Front End for the IEEE 802.15.4 Standard Using Tuned Passive Mixer Output Pole.

Aaron V. T. Do, Chirn Chye Boon, Manthena Vamshi Krishna, Manh Anh Do, Kiat Seng Yeo

Proceedings of the VLSI-SoC: Forward-Looking Trends in IC and Systems Design, 2010