Mansour Shashaani

According to our database, Mansour Shashaani authored at least 4 papers between 1999 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

A 1-58.125Gb/s, 5-33dB IL Multi-Protocol Ethernet-Compliant Analog PAM-4 Receiver with 16 DFE Taps in 10nm.

Bahram Zand, Mike Bichan, Alireza Mahmoodi, Mansour Shashaani, Jing Wang, Ruslana Shulyzki, James Guthrie, Katya Tyshchenko, Junhong Zhao, Eric Liu, Nima Soltani, Al Freeman, Rishi Anand, Syed Rubab, Ranjit Khela, Shaham Sharifian, Karl Herterich

Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2000

A Low-Speed BIST Framework for High-Performance Circuit Testing.

Hans G. Kerkhoff, Mansour Shashaani, Manoj Sachdev

Proceedings of the 18th IEEE VLSI Test Symposium (VTS 2000), 30 April, 2000

Bridging the testing speed gap: design for delay testability.

Han Speek, Hans G. Kerkhoff, Manoj Sachdev, Mansour Shashaani

Proceedings of the 5th European Test Workshop, 2000

1999

A DFT technique for high performance circuit testing.

Mansour Shashaani, Manoj Sachdev

Proceedings of the Proceedings IEEE International Test Conference 1999, 1999