Mansour H. Assaf
Orcid: 0000-0003-3052-9469
According to our database1,
Mansour H. Assaf
authored at least 43 papers
between 1998 and 2024.
Collaborative distances:
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Bibliography
2024
PeerJ Comput. Sci., 2024
Ground Simulation and Pattern Recognition for Arbitrary Distance Optical Transmission of a Free-Space Laser Communication System.
IEEE Access, 2024
Enhancing Reliability in Induction Machines: A Focus on Stator Inter-Turn Fault Diagnosis.
Proceedings of the 18th IEEE International Symposium on Applied Computational Intelligence and Informatics, 2024
2023
Comput. methods Biomech. Biomed. Eng. Imaging Vis., May, 2023
Comparative Analysis of Machine Learning Techniques for Bearing Fault Classification in Rotating Machinery.
Proceedings of the 17th IEEE International Symposium on Applied Computational Intelligence and Informatics, 2023
Proceedings of the IEEE International Symposium on Medical Measurements and Applications, 2023
Proceedings of the IEEE International Symposium on Medical Measurements and Applications, 2023
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2023
2022
Proceedings of the IEEE International Workshop on Metrology for Automotive, 2022
Proceedings of the IEEE International Symposium on Medical Measurements and Applications, 2022
2021
Proceedings of the IEEE International Workshop on Metrology for Automotive, 2021
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2021
2020
Knowl. Eng. Rev., 2020
2019
Int. J. Image Graph., 2019
TEduChain: A Platform for Crowdsourcing Tertiary Education Fund using Blockchain Technology.
CoRR, 2019
Proceedings of the PRICAI 2019: Trends in Artificial Intelligence, 2019
2018
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2018
2016
Proceedings of the Internet of Vehicles - Technologies and Services, 2016
Short duration voice data speaker recognition system using novel fuzzy vector quantization algorithm.
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2016
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2016
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2016
2015
Designing elementary-tree space compressors using AND/NAND and XOR/XNOR combinations.
Proceedings of the 2015 IEEE International Instrumentation and Measurement Technology Conference (I2MTC) Proceedings, 2015
Proceedings of the 2015 IEEE International Instrumentation and Measurement Technology Conference (I2MTC) Proceedings, 2015
2014
Design and implementation of high-performance master/slave memory controller with microcontroller bus architecture.
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2014
2013
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2013
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2013
2008
On a New Graph Theory Approach to Designing Zero-Aliasing Space Compressors for Built-In Self-Testing.
IEEE Trans. Instrum. Meas., 2008
Proceedings of the 2008 International Conference on Information Technology, 2008
2007
IEEE Trans. Instrum. Meas., 2007
IEEE Trans. Instrum. Meas., 2007
2005
IEEE Trans. Instrum. Meas., 2005
Revisiting response compaction in space for full-scan circuits with nonexhaustive test sets using concept of sequence characterization.
IEEE Trans. Instrum. Meas., 2005
2004
Aliasing-Free Compaction in Testing Cores-Based System-on-Chip (SoC) using Compatibility of Response Data outputs.
Trans. SDPS, 2004
Altera Max Plus II Development Environment in Fault Simulation and Test Implementation of Embedded Cores-Based Sequential Circuits.
Proceedings of the Distributed Computing, 2004
Enhancing Testability in Architectural Design for the New Generation of Core-Based Embedded Systems.
Proceedings of the 8th IEEE International Symposium on High-Assurance Systems Engineering (HASE 2004), 2004
Implementation of Embedded Cores-Based Digital Devices in JBits Java Simulation Environment.
Proceedings of the Intelligent Information Technology, 2004
2003
Parity bit signature in response data compaction and built-in self-testing of VLSI circuits with nonexhaustive test sets.
IEEE Trans. Instrum. Meas., 2003
JBits Implementation and Design Verification in Space Compressor Design of Digital Circuits.
Proceedings of the 22nd IASTED International Conference on Modelling, 2003
2002
Data compression in space under generalized mergeability based on concepts of cover table and frequency ordering.
IEEE Trans. Instrum. Meas., 2002
Design of Aliasing Free Space Compressor in BIST with Maximal Compaction Ratio Using Concepts of Strong and Weak Compatibilities of Response Data Outputs and Generalized Sequence Mergeability.
Proceedings of the Distributed Computing, 2002
2001
Fault tolerance in systems design in VLSI using data compression under constraints of failure probabilities.
IEEE Trans. Instrum. Meas., 2001
2000
1998