Manar N. Shaker

Orcid: 0009-0001-9140-4371

According to our database1, Manar N. Shaker authored at least 7 papers between 2016 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Reliability Modeling of Fault-Tolerant FPGA-Based Architectures in Space Applications for Soft and Hard Error Recovery.
IEEE Access, 2024

2020
Work-in-Progress: Triple Event Upset Tolerant Area-Efficient FPGA-Based System for Space Applications And Nuclear Plants.
Proceedings of the 16th IEEE International Conference on Factory Communication Systems, 2020

2019
Mitigating the Effect of Multiple Event Upsets in FPGA-Based Automotive Applications.
Proceedings of the 8th Mediterranean Conference on Embedded Computing, 2019

FPGA-based Ethernet Switch for NCS with Partial Fault Tolerance.
Proceedings of the 31st International Conference on Microelectronics, 2019

Reliable FPGA-Based Network Architecture for Smart Cities.
Proceedings of the 31st International Conference on Microelectronics, 2019

Reliable FPGA-based Camera Sensor for NCS.
Proceedings of the 11th International Conference on Electronics, 2019

2016
Effect of open faults in FPGA switch matrices on fault detection mechanisms.
Proceedings of the 28th International Conference on Microelectronics, 2016


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