Manan Mewada

According to our database, Manan Mewada authored at least 4 papers between 2016 and 2019.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2019

Improving the performance of transmission gate and hybrid CMOS Full Adders in chain and tree structure architectures.

Manan Mewada, Mazad Zaveri, Rajesh Amratlal Thakker

Integr., 2019

2017

Estimating the Maximum Propagation Delay of 4-bit Ripple Carry Adder Using Reduced Input Transitions.

Manan Mewada, Mazad Zaveri, Anurag Lakhlani

Proceedings of the VLSI Design and Test - 21st International Symposium, 2017

2016

A low-power high-speed hybrid full adder.

Manan Mewada, Mazad Zaveri

Proceedings of the 20th International Symposium on VLSI Design and Test, 2016

An input test pattern for characterization of a full-adder and n-bit ripple carry adder.

Manan Mewada, Mazad Zaveri

Proceedings of the 2016 International Conference on Advances in Computing, 2016