Malik Imran

Zaid Bassfar

Sajjad Shaukat Jamal

IEEE Access, 2024

Multiplierless Design of High-Speed Very Large Constant Multiplications.

[BibT_eX]

[DOI]

Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

REPQC: Reverse Engineering and Backdooring Hardware Accelerators for Post-quantum Cryptography.

[BibT_eX]

[DOI]

Proceedings of the 19th ACM Asia Conference on Computer and Communications Security, 2024

2023

High-speed SABER key encapsulation mechanism in 65nm CMOS.

[BibT_eX]

[DOI]

J. Cryptogr. Eng., November, 2023

A Versatile and Flexible Multiplier Generator for Large Integer Polynomials.

[BibT_eX]

[DOI]

Zain Ul Abideen

J. Hardw. Syst. Secur., September, 2023

KaLi: A Crystal for Post-Quantum Security Using Kyber and Dilithium.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., February, 2023

Towards High-speed ASIC Implementations of Post-Quantum Cryptography.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2023

2022

Multiplierless Design of Very Large Constant Multiplications in Cryptography.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2022

KaLi: A Crystal for Post-Quantum Security.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2022

Ransomware Attack as Hardware Trojan: A Feasibility and Demonstration Study.

[BibT_eX]

[DOI]

IEEE Access, 2022

2021

Design Space Exploration of SABER in 65nm ASIC.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2021

A systematic review of scalable hardware architectures for pattern matching in network security.

[BibT_eX]

[DOI]

Muhammad Najam-ul-Islam

Comput. Electr. Eng., 2021

An Optimized Architecture for Binary Huff Curves With Improved Security.

[BibT_eX]

[DOI]

IEEE Access, 2021

Side-Channel Trojan Insertion - a Practical Foundry-Side Attack via ECO.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

An Open-source Library of Large Integer Polynomial Multipliers.

[BibT_eX]

[DOI]

Zain Ul Abideen

Proceedings of the 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2021

2020

A 4-Stage Pipelined Architecture for Point Multiplication of Binary Huff Curves.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 2020

An Area Aware Accelerator for Elliptic Curve Point Multiplication.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2020

A Systematic Study of Lattice-based NIST PQC Algorithms: from Reference Implementations to Hardware Accelerators.

[BibT_eX]

[DOI]

Zain Ul Abideen

CoRR, 2020

Exploration of Hardware Architectures for String Matching Algorithms in Network Intrusion Detection Systems.

[BibT_eX]

[DOI]

Proceedings of the IAIT 2020: The 11th International Conference on Advances in Information Technology, 2020

2019

Erratum: Flexible Architectures for Cryptographic Algorithms - A Systematic Literature Review.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 2019

Flexible Architectures for Cryptographic Algorithms - A Systematic Literature Review.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 2019

Throughput/area optimised pipelined architecture for elliptic curve crypto processor.

[BibT_eX]

[DOI]

IET Comput. Digit. Tech., 2019

2018

ACryp-Proc: Flexible Asymmetric Crypto Processor for Point Multiplication.

[BibT_eX]

[DOI]

Muhammad Najam-ul-Islam

IEEE Access, 2018

2017

Towards an Optimized Architecture for Unified Binary Huff Curves.

[BibT_eX]

[DOI]

Muhammad Najam-ul-Islam

J. Circuits Syst. Comput., 2017

2016

Comparative analysis of flexible cryptographic implementations.

[BibT_eX]

[DOI]