Makoto Endo

According to our database, Makoto Endo authored at least 17 papers between 1983 and 2007.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2007

Single-Chip MPEG-2 422P@HL CODEC LSI With Multichip Configuration for Large Scale Processing Beyond HDTV Level.

Hiroe Iwasaki, Jiro Naganuma, Koyo Nitta, Ken Nakamura, Takeshi Yoshitome, Mitsuo Ogura, Yasuyuki Nakajima, Yutaka Tashiro, Takayuki Onishi, Mitsuo Ikeda, Toshihiro Minami, Makoto Endo, Yoshiyuki Yashima

IEEE Trans. Very Large Scale Integr. Syst., 2007

2006

Highly accurate de-jittering scheme for broadcast quality video transmission.

Takayuki Onishi, Mitsuo Ikeda, Jiro Naganuma, Makoto Endo, Yoshiyuki Yashima

Syst. Comput. Jpn., 2006

2005

MPEG-2 real-time software CODEC for full-duplex transmission application over IP networks.

Hiroe Iwasaki, Jiro Naganuma, Makoto Endo, Yoshiyuki Yashima

Syst. Comput. Jpn., 2005

2004

A distributed TS-MUX architecture for multi-chip extension beyond the HDTV level.

Takayuki Onishi, Mitsuo Ikeda, Jiro Naganuma, Makoto Endo, Yoshiyuki Yashima

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003

Scalable architecture for use in an over-HDTV real-time codec system for multiresolution video.

Takeshi Yoshitome, Ken Nakamura, Yoshiyuki Yashima, Makoto Endo

Proceedings of the Visual Communications and Image Processing 2003, 2003

Single-Chip MPEG-2 422P@HL CODEC LSI with Multi-Chip Configuration for Large Scale Processing beyond HDTV Level.

Hiroe Iwasaki, Jiro Naganuma, Koyo Nitta, Ken Nakamura, Takeshi Yoshitome, Mitsuo Ogura, Yasuyuki Nakajima, Yutaka Tashiro, Takayuki Onishi, Mitsuo Ikeda, Makoto Endo

Proceedings of the 2003 Design, 2003

A 1.1 W single-chip MPEG-2 HDTV codec LSI for embedding in consumer-oriented mobile codec systems.

Hiroe Iwasaki, Jiro Naganuma, Yasuyuki Nakajima, Yutaka Tashiro, Ken Nakamura, Takeshi Yoshitome, Takayuki Onishi, Mitsuo Ikeda, Takaaki Izuoka, Makoto Endo

Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

2002

Advanced concurrent design environment for multimedia system LSIs.

Hiroe Iwasaki, Katsuyuki Ochiai, Jiro Naganuma, Makoto Endo, Takeshi Ogura

Syst. Comput. Jpn., 2002

1999

A memory-based architecture for MPEG2 system protocol LSIs.

Minoru Inamori, Jiro Naganuma, Makoto Endo

IEEE Trans. Very Large Scale Integr. Syst., 1999

SuperENC: MPEG-2 video encoder chip.

Mitsuo Ikeda, Toshio Kondo, Koyo Nitta, Kazuhito Suguri, Takeshi Yoshitome, Toshihiro Minami, Hiroe Iwasaki, Katsuyuki Ochiai, Jiro Naganuma, Makoto Endo, Yutaka Tashiro, Hiroshi Watanabe, Naoki Kobayashi, Tsuneo Okubo, Ryota Kasai

IEEE Micro, 1999

On-Chip Multimedia Real-Time OS and its MPEG-2 Applications.

Hiroe Iwasaki, Jiro Naganuma, Makoto Endo, Takeshi Ogura

Proceedings of the 6th International Workshop on Real-Time Computing and Applications Symposium (RTCSA '99), 1999

High-speed Software-based Platform for Embedded Software of a Single-chip MPEG-2 Video Encoder LSI with HDTV Scalabilit.

Katsuyuki Ochiai, Hiroe Iwasaki, Jiro Naganuma, Makoto Endo, Takeshi Ogura

Proceedings of the 1999 Design, 1999

1996

A Memory-based Architecture for MPEG2 System Protocol LSIs.

Minoru Inamori, Jiro Naganuma, Haruo Wakabayashi, Makoto Endo

Proceedings of the 1996 European Design and Test Conference, 1996

1990

A CAD Process Scheduling Technique.

Toshiaki Miyazaki, Tamio Hoshino, Makoto Endo

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

1989

The Roles of Logic Synthesis Systems.

Makoto Endo

Proceedings of the Information Processing 89, Proceedings of the IFIP 11th World Computer Congress, San Francisco, USA, August 28, 1989

1985

An Integrated Design Automation System for VLSI Circuits.

Osamu Karatsu, Tamio Hoshino, Makoto Endo, Hitoshi Kitazawa, Tohru Adachi, Kazuhiro Ueda

IEEE Des. Test, 1985

1983

A New Automatic Logic Interconnection Verification System for VLSI Design.

Takashi Watanabe, Makoto Endo, Norio Miyahara

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1983