Majid Ahmadi

Orcid: 0000-0001-5781-6754

According to our database1, Majid Ahmadi authored at least 307 papers between 1981 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Manhattan Rule for Robust In-Situ Training of Memristive Deep Neural Network Accelerators.
Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024

A Neural Assembly-Based State Machine Design.
Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024

Memristive-Based Full Adder.
Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024

POD: PCM-Based Computing Platform for Object Detection in Biomedical Imaging Application.
Proceedings of the 15th IEEE Latin America Symposium on Circuits and Systems, 2024

Gesture Detection Using an Infrared Camera.
Proceedings of the 6th International Conference on Image Processing and Machine Vision, 2024

2023
A Memristive-Based Design of a Core Digital Circuit for Elliptic Curve Cryptography.
J. Circuits Syst. Comput., October, 2023

Design and Analysis of the Morris-Lecar Spiking Neuron in Efficient Analog Implementation.
IEEE Trans. Circuits Syst. II Express Briefs, 2023

Movement Optimization of Robotic Arms for Energy and Time Reduction using Evolutionary Algorithms.
CoRR, 2023

A Novel Model for Driver Lane Change Prediction in Cooperative Adaptive Cruise Control Systems.
CoRR, 2023

Memristive Memory Enhancement by Device Miniaturization for Neuromorphic Computing.
CoRR, 2023

Self-assembled neuromorphic networks at self-organized criticality in Ag-hBN platform.
CoRR, 2023

Uniformity Adjustment of Delay-Based Physical Unclonable Function: Modeling and Analysis.
Proceedings of the 19th International Conference on Synthesis, 2023

A Programmable Circuit Based on the Combination of VTM Cellular Crossbars.
Proceedings of the 19th International Conference on Synthesis, 2023

Design and Implementation of Full Adder Circuit Based on VTM-Logic Gates.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

2022
Characterizing a standard cell library for large scale design of memristive based signal processing.
IET Circuits Devices Syst., 2022

A robust multiobjective integrated master surgery schedule and surgical case assignment model at a publicly funded hospital.
Comput. Ind. Eng., 2022

A Digital Realization of Neuroglial Interaction Model and Its Network Structure.
IEEE Access, 2022

A Review of Cyber-Resilient Smart Grid.
Proceedings of the World Automation Congress, 2022

Toward A Formalized Approach for Spike Sorting Algorithms and Hardware Evaluation.
Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022

Spiking Neurons: A New Entropy Source for Physically Unclonable Functions.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Design of A New Memristive-Based Architecture Using VTM Method.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Digital Realization of Conductance-Based Adaptive Exponential Integrate-and-Fire Neuron Model.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

Linear Time-Varying Causal Systems Transformed.
Proceedings of the IEEE Canadian Conference on Electrical and Computer Engineering, 2022

2021
Digital Realization of Ca2+ Oscillation With Impact of Amyloid-β.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

Performance Evaluation of Entropy Based LBP for Face Recognition.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

A Novel Architecture for Memristor-Based Logic.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

Frequency Response of Linear Time-Varying Circuits Using Iterated Laplace Transform.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

2020
A Novel Approach to Reliable Sensor Selection and Target Tracking in Sensor Networks.
IEEE Trans. Ind. Informatics, 2020

CORDIC-Astrocyte: Tripartite Glutamate-IP3-Ca<sup>2+</sup> Interaction Dynamics on FPGA.
IEEE Trans. Biomed. Circuits Syst., 2020

Similarity-learning information-fusion schemes for missing data imputation.
Knowl. Based Syst., 2020

Time Step Impact on Performance and Accuracy of Izhikevich Neuron: Software Simulation and Hardware Implementation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Low Power Memristor-Based Shift Register Design.
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

Hybrid Memristor-CMOS Based Up-Down Counter Design.
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

2019
Digital Hardware Implementation of Gaussian Wilson-Cowan Neocortex Model.
IEEE Trans. Emerg. Top. Comput. Intell., 2019

An Efficient Uniform-Segmented Neuron Model for Large-Scale Neuromorphic Circuit Design: Simulation and FPGA Synthesis Results.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

CORDIC-SNN: On-FPGA STDP Learning With Izhikevich Neurons.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Implementation of application specific soft-core architecture for switching converters.
Comput. Electr. Eng., 2019

Digital Implementation of a Biological-Plausible Model for Astrocyte Ca ^2+ Oscillations.
Proceedings of the Advances in Computational Intelligence, 2019

A Digital Pseudo Random Number Generator Based on a Chaotic Dynamic System.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

2018
A 2M1M Crossbar Architecture: Memory.
IEEE Trans. Very Large Scale Integr. Syst., 2018

Efficient VLSI Implementation of a Sequential Finite Field Multiplier Using Reordered Normal Basis in Domino Logic.
IEEE Trans. Very Large Scale Integr. Syst., 2018

Logic Design on Mirrored Memristive Crossbars.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

A modified technique for face recognition under degraded conditions.
J. Vis. Commun. Image Represent., 2018

A Memristive TaOx-Based Median Filter Design for Image Processing Application.
Proceedings of the 15th International Conference on Synthesis, 2018

Review of Arithmetic Operations Using the Continuous Valued Number System.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

Hardware Design of Chaotic Pseudo-Random Number Generator Based on Nonlinear Feedback Shift Register.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

Digital Hardware Implementation of a Biological Central Pattern Generator.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

Secure Scan Architecture Using Clock and Data Recovery Technique.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Digital Realization of PSTDP and TSTDP Learning.
Proceedings of the 2018 International Joint Conference on Neural Networks, 2018

Hardware Implementation of A Chaotic Pseudo Random Number Generator Based on 3D Chaotic System without Equilibrium.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

2017
Low-Power Design for a Digit-Serial Polynomial Basis Finite Field Multiplier Using Factoring Technique.
IEEE Trans. Very Large Scale Integr. Syst., 2017

Digit-Level Serial-In Parallel-Out Multiplier Using Redundant Representation for a Class of Finite Fields.
IEEE Trans. Very Large Scale Integr. Syst., 2017

A Fully Serial-In Parallel-Out Digit-Level Finite Field Multiplier in 𝔽<sub>2<sup>m</sup></sub> Using Redundant Representation.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

Modular neuron comprises of memristor-based synapse.
Neural Comput. Appl., 2017

Accurate charge transport model for nanoionic memristive devices.
Microelectron. J., 2017

A hybrid memristor-CMOS multiplier design based on memristive universal logic gates.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

A neural network architecture using high resolution multiplying digital to analog converters.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

A secure test solution for sensor nodes containing crypto-cores.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

STDP-based unsupervised learning of memristive spiking neural network by Morris-Lecar model.
Proceedings of the 2017 International Joint Conference on Neural Networks, 2017

Hybrid memristor-CMOS based linear feedback shift register design.
Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, 2017

Digital FCS-MP control of an AC-DC power converter to improve dynamic response.
Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, 2017

A MEMS based rectifier for energy harvesting.
Proceedings of the 2017 European Conference on Circuit Theory and Design, 2017

A novel CVNS adder with memristive analog memory.
Proceedings of the 2017 European Conference on Circuit Theory and Design, 2017

Two-electrode ECG measurement circuit using a feed forward CMRR enhancement method.
Proceedings of the 30th IEEE Canadian Conference on Electrical and Computer Engineering, 2017

Ultra-low power Op-Amp design with memristor-based compensation.
Proceedings of the 30th IEEE Canadian Conference on Electrical and Computer Engineering, 2017

A memristor based binary multiplier.
Proceedings of the 30th IEEE Canadian Conference on Electrical and Computer Engineering, 2017

2016
Designing an Optimal Energy Efficient Cluster-Based Spectrum Sensing for Cognitive Radio Networks.
IEEE Commun. Lett., 2016

A modified synapse model for neuromorphic circuits.
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016

Analog cellular neural network for application in physical unclonable functions.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Parallel randomized KD-tree forest on GPU cluster for image descriptor matching.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Memristor-based 4: 2 compressor cells design.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Hardware implementation of deep brain stimulator on a biophysical neural population model.
Proceedings of the 2016 International Joint Conference on Neural Networks, 2016

A digital neuromorphic circuit for neural-glial interaction.
Proceedings of the 2016 International Joint Conference on Neural Networks, 2016

Evolving Spiking Neural Networks of artificial creatures using Genetic Algorithm.
Proceedings of the 2016 International Joint Conference on Neural Networks, 2016

A novel approach to provide safe indoor industrial environment.
Proceedings of the International Conference on High Performance Computing & Simulation, 2016

Brain-inspired pattern classification with memristive neural network using the Hodgkin-Huxley neuron.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

A novel hybrid CMOS-memristor logic circuit using Memristor Ratioed Logic.
Proceedings of the 2016 IEEE Canadian Conference on Electrical and Computer Engineering, 2016

Energy harvesting for IoT sensors utilizing MEMS technology.
Proceedings of the 2016 IEEE Canadian Conference on Electrical and Computer Engineering, 2016

A cellular automata based Izhikevich neuron model.
Proceedings of the 2016 IEEE Canadian Conference on Electrical and Computer Engineering, 2016

Precise digital implementations of hyperbolic tanh and sigmoid function.
Proceedings of the 50th Asilomar Conference on Signals, Systems and Computers, 2016

2015
Optimizing Load Control in a Collaborative Residential Microgrid Environment.
IEEE Trans. Smart Grid, 2015

A Hopf Resonator for 2-D Artificial Cochlea: Piecewise Linear Model and Digital Implementation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

Local gradient-based illumination invariant face recognition using local phase quantisation and multi-resolution local binary pattern fusion.
IET Image Process., 2015

Optimization of multi-level hierarchical cluster-based spectrum sensing structure in cognitive radio networks.
Digit. Signal Process., 2015

Partial Face Recognition Based on Template Matching.
Proceedings of the 11th International Conference on Signal-Image Technology & Internet-Based Systems, 2015

Resonant frequency calculation of square diaphragms: A comparison.
Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015

Novel energy efficient strategies for cooperative spectrum sensing in cognitive radio networks.
Proceedings of the IEEE International Symposium on Signal Processing and Information Technology, 2015

Hyperbolic tangent passive resistive-type neuron.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Massively parallel KD-tree construction and nearest neighbor search algorithms.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A modular mixed-signal CVNS neural network architecture.
Proceedings of the 2015 International Joint Conference on Neural Networks, 2015

Memristor-based linear feedback shift register based on material implication logic.
Proceedings of the European Conference on Circuit Theory and Design, 2015

A novel memristor based integrate-and-fire neuron implementation using material implication logic.
Proceedings of the IEEE 28th Canadian Conference on Electrical and Computer Engineering, 2015

Sound target localization in a 2-D microphone array.
Proceedings of the IEEE 28th Canadian Conference on Electrical and Computer Engineering, 2015

Moving objects tracking from most probable regions and eliminating camera motion.
Proceedings of the IEEE 28th Canadian Conference on Electrical and Computer Engineering, 2015

A CMOS implementation of programmable Gaussian fuzzifier.
Proceedings of the IEEE 28th Canadian Conference on Electrical and Computer Engineering, 2015

Low power design of a word-level finite field multiplier using Reordered Normal Basis.
Proceedings of the 49th Asilomar Conference on Signals, Systems and Computers, 2015

2014
Radio Propagation Characteristics of indoor Location System Based on RSSI at 490 MHz.
J. Circuits Syst. Comput., 2014

Two-dimensional analog filtering and its implications on circuit theory.
Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014

Agile hierarchical cluster structure-based cooperative spectrum sensing in cognitive radio networks.
Proceedings of the 26th International Conference on Microelectronics, 2014

Optimized implementation of memristor-based full adder by material implication logic.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

A low cost biomimetic implementation of a CPG based on AdEx neuron model.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

Effectiveness of various classification techniques on human face recognition.
Proceedings of the International Conference on High Performance Computing & Simulation, 2014

2013
Testing 3-D IC Through-Silicon-Vias (TSVs) by Direct Probing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

Charge-Controlled Readout and BIST Circuit for MEMS Sensors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

An efficient illumination invariant face recognition framework via illumination enhancement and DD-DT<i>C</i>WT filtering.
Pattern Recognit., 2013

Analysis of linear time-varying circuits by two-dimensional analog filtering.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

On the impact of acceleration on the performance of mobile cognitive radios.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Application of neural networks with CSD coefficients for human face recognition.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

A GPU implementation of the Montgomery multiplication algorithm for elliptic curve cryptography.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Interpolation of low resolution images for improved accuracy in human face recognition.
Proceedings of the 20th IEEE International Conference on Electronics, 2013

2012
Analog Implementation of a Novel Resistive-Type Sigmoidal Neuron.
IEEE Trans. Very Large Scale Integr. Syst., 2012

Wavelet-Domain Blur Invariants for Image Analysis.
IEEE Trans. Image Process., 2012

An Efficient Finite Field Multiplier Using Redundant Representation.
ACM Trans. Embed. Comput. Syst., 2012

A Prototype CVNS Distributed Neural Network Using Synapse-Neuron Modules.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012

High-Speed Architectures for Multiplication Using Reordered Normal Basis.
IEEE Trans. Computers, 2012

Tunable halfband-pair wavelet filter banks and application to multifocus image fusion.
Pattern Recognit., 2012

A readout Solution for MEMS Sensors.
J. Circuits Syst. Comput., 2012

Low-power oscillator for passive radio frequency identification transponders.
IET Circuits Devices Syst., 2012

Low-Power Finite Impulse Response (FIR) Filter Design Using Two-Dimensional Logarithmic Number System (2DLNS) Representations.
Circuits Syst. Signal Process., 2012

Amendment on DPM and OJA Class Subspace Tracking Methods
CoRR, 2012

A compact wide scanning directional antenna for RFID passive tags.
Proceedings of the 10th IEEE International NEWCAS Conference, 2012

Bifrequency characterization of linear time-varying systems.
Proceedings of the 10th IEEE International NEWCAS Conference, 2012

Bifrequency characterization of linear time-varying systems: A tutorial with examples.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

A Fault-Tolerant Area-Efficient Current-Mode ADC for Multiple-Valued Neural Networks.
Proceedings of the 42nd IEEE International Symposium on Multiple-Valued Logic, 2012

A novel segmentation technique for splitting a typed Persian text to sub-words.
Proceedings of the 5th International Symposium on Communications, 2012

High performance prime field multiplication for GPU.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A neural network approach to online Devanagari handwritten character recognition.
Proceedings of the 2012 International Conference on High Performance Computing & Simulation, 2012

Human face recognition under occlusion using LBP and entropy weighted voting.
Proceedings of the 21st International Conference on Pattern Recognition, 2012

Generalized ordinary moment based blur invariant descriptors for face recognition with degraded images.
Proceedings of the 21st International Conference on Pattern Recognition, 2012

Illumination suppression for illumination invariant face recognition.
Proceedings of the 21st International Conference on Pattern Recognition, 2012

A hybrid algorithm for range estimation in RFID systems.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

Power efficiency of digit level polynomial basis finite field multipliers in GF(2<sup>283</sup>).
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

Fast modular reduction for large-integer multiplication for cryptosystem application.
Proceedings of the 2012 Second International Conference on Digital Information and Communication Technology and it's Applications (DICTAP), 2012

2011
CVNS-Based Storage and Refreshing Scheme for a Multi-Valued Dynamic Memory.
IEEE Trans. Very Large Scale Integr. Syst., 2011

A Word-Level Finite Field Multiplier Using Normal Basis.
IEEE Trans. Computers, 2011

Illumination invariant feature extraction and mutual-information-based local matching for face recognition under illumination variation and occlusion.
Pattern Recognit., 2011

Error Recovery in Continuous Valued Number System.
J. Circuits Syst. Comput., 2011

A study on resistive-type truncated CVNS Distributed Neural Networks.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Wavelet Domain Blur Invariants for 1D Discrete Signals.
Proceedings of the Image Analysis and Recognition - 8th International Conference, 2011

Image processing technique for segmenting microstructural porosity of laser-welded thermoplastics.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

Performance enhancement of single electron junction 1-bit full adder.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

A signal integrity enhancement technique for high speed test systems.
Proceedings of the 24th Canadian Conference on Electrical and Computer Engineering, 2011

2010
An All-Digital Self-Calibration Method for a Vernier-Based Time-to-Digital Converter.
IEEE Trans. Instrum. Meas., 2010

Robust indoor positioning using differential wi-fi access points.
IEEE Trans. Consumer Electron., 2010

Resistive-Type CVNS Distributed Neural Networks With Improved Noise-to-Signal Ratio.
IEEE Trans. Circuits Syst. II Express Briefs, 2010

Blur invariants: A novel representation in the wavelet domain.
Pattern Recognit., 2010

Investigating the Performance of Naive- Bayes Classifiers and K- Nearest Neighbor Classifiers.
J. Convergence Inf. Technol., 2010

High-speed hardware implementation of a serial-in parallel-out finite field multiplier using reordered normal basis.
IET Circuits Devices Syst., 2010

An Efficient Automatic Mass Classification Method In Digitized Mammograms Using Artificial Neural Network
CoRR, 2010

Computer-Aided Detection and Classification of Masses in Digitized Mammograms Using Artificial Neural Network.
Proceedings of the Advances in Swarm Intelligence, First International Conference, 2010

High-speed CMOS track-and-hold with an offset cancellation replica circuit.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Recursive architectures for 2DLNS multiplication.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

An efficient method for face recognition under illumination variations.
Proceedings of the 2010 International Conference on High Performance Computing & Simulation, 2010

A weighted voting scheme for recognition of faces with illumination variation.
Proceedings of the 11th International Conference on Control, 2010

2009
A High-Speed Word Level Finite Field Multiplier in BBF<sub>2<sup>m</sup></sub> Using Redundant Representation.
IEEE Trans. Very Large Scale Integr. Syst., 2009

A Delay Generation Technique for Narrow Time Interval Measurement.
IEEE Trans. Instrum. Meas., 2009

A Stereo Vision-Based Bin Picking System Using Hopfield Neural Networks.
J. Circuits Syst. Comput., 2009

A Robust Wavelet Based Feature Extraction Method.
Proceedings of the IEEE International Conference on Systems, 2009

An Adaptive Ant-Based Clustering Algorithm with Improved Environment Perception.
Proceedings of the IEEE International Conference on Systems, 2009

An Efficient Wavelet Based Feature Extraction Method for Face Recognition.
Proceedings of the Advances in Neural Networks, 2009

16-level Current-Mode Multiple-Valued Dynamic Memory with Increased Noise Margin.
Proceedings of the ISMVL 2009, 2009

Efficient Hardware Implementation of the Hyperbolic Tangent Sigmoid Function.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Current-mode Multiple-valued Dynamic Memory.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

A Mutual Information Based Face Recognition Method.
Proceedings of the Neural Information Processing, 16th International Conference, 2009

Differential access points for indoor location estimation.
Proceedings of the 2009 IEEE International Conference on Electro/Information Technology, 2009

Artificial neural networks activation function HDL coder.
Proceedings of the 2009 IEEE International Conference on Electro/Information Technology, 2009

High speed VLSI implementation of a finite field multiplier using redundant representation.
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009

An area-speed efficient method for current mode analog to digital converters.
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009

Low power high performance keeper technique for high fan-in dynamic gates.
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009

2008
Low-Power Mixed-Signal CVNS-Based 64-Bit Adder for Media Signal Processing.
IEEE Trans. Very Large Scale Integr. Syst., 2008

A New Finite-Field Multiplier Using Redundant Representation.
IEEE Trans. Computers, 2008

A hidden Markov model-based character extraction method.
Pattern Recognit., 2008

A new method for hierarchical clustering combination.
Intell. Data Anal., 2008

A high speed word level finite field multiplier using reordered normal basis.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Robust analog neural network based on continuous valued number system.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Realizing high throughput transforms of H.264/AVC.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

A New Motion Estimation Architecture For Block-Matching Algorithm.
Proceedings of the IEEE International Conference on Networking, Sensing and Control, 2008

A motion adaptive deinterlacing method with hierarchical motion detection algorithm.
Proceedings of the International Conference on Image Processing, 2008

Image processing techniques for quality inspection of gelatin capsules in pharmaceutical applications.
Proceedings of the 10th International Conference on Control, 2008

2007
An Improved Max-Log-MAP Algorithm for Turbo Decoding and Turbo Equalization.
IEEE Trans. Instrum. Meas., 2007

Test and Measurement of Analog and RF Cores in Mixed-Signal SoC Environment.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Comb Architectures for Finite Field Multiplication in F(2^m).
IEEE Trans. Computers, 2007

Content-Based Image Retrieval based on efficient fuzzy color signature.
Proceedings of the IEEE International Conference on Systems, 2007

Digital Multiplication using Continuous Valued Digits.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Performance Analysis of Genetic Algorithm for the Design of Linear Phase Digital Filter Banks with CSD Coefficients.
Proceedings of the Third International Conference on Natural Computation, 2007

Common Subexpression Elimination for Digital Filters Using Genetic Algorithm.
Proceedings of the 14th IEEE International Conference on Electronics, 2007

A Human Face Recognition System Using Neural Classifiers.
Proceedings of the 4th International Conference on Computer Graphics, 2007

Three-Level Gray-Scale Images Segmentation using Non-extensive Entropy.
Proceedings of the 4th International Conference on Computer Graphics, 2007

Improved Co-occurrence Matrix as a Feature Space for Relative Entropy-based Image Thresholding.
Proceedings of the 4th International Conference on Computer Graphics, 2007

2006
Automatic localization of craniofacial landmarks using multi-layer perceptron as a function approximator.
Pattern Recognit. Lett., 2006

On the Reduction of Interconnect Effects in Deep Submicron Implementations of Digital Multiplication Architectures.
J. Circuits Syst. Comput., 2006

A new compression based approach for reconfiguration overhead reduction in virtex based RTR systems.
Comput. Electr. Eng., 2006

An Edge Based Thresholding Method.
Proceedings of the IEEE International Conference on Systems, 2006

3D position sensing using a Hopfield neural network stereo matching algorithm.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A binarization method for scanned documents based on hidden Markov model.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A Parallel-In Serial-Out Multiplier Using Redundant Representation for A Class of Finite Fields.
Proceedings of the 13th IEEE International Conference on Electronics, 2006

The 2-D Quantized DCT with Distributed Arithmetic.
Proceedings of the Canadian Conference on Electrical and Computer Engineering, 2006

2005
A Novel State Encoding Algorithm for Low Power Implementation.
J. Circuits Syst. Comput., 2005

A linear log-MAP algorithm for turbo decoding and turbo equalization.
Proceedings of the 2005 IEEE International Conference on Wireless And Mobile Computing, 2005

A novel multiplier for high-speed applications.
Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005

A weighted Pseudo-Zernike feature extractor for face recognition.
Proceedings of the IEEE International Conference on Systems, 2005

An efficient restoration algorithm for the historic middle-age Persian (Pahlavi) manuscripts.
Proceedings of the IEEE International Conference on Systems, 2005

Some properties of generalized 2-D mirror image and anti mirror image polynomials.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Power and delay analysis of 4: 2 compressor cells.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A New Method of Electrostatic Force Modeling for MEMS Sensors and Actuators.
Proceedings of the 2005 International Conference on MEMS, 2005

Extraction of objects and page segmentation of composite documents with non-uniform background.
Proceedings of the ICINCO 2005, 2005

Fixed Pixel Threshold PDC Algorithm and Its Implementation for Full Search Block Matching Motion Estimation.
Proceedings of the Image Analysis and Recognition, Second International Conference, 2005

2004
Automatic localization of craniofacial landmarks for assisted cephalometry.
Pattern Recognit., 2004

N-feature neural network human face recognition.
Image Vis. Comput., 2004

A Sigma-Delta Modulator for Digital Hearing Instruments Using 0.18µm CMOS Technology.
Proceedings of the 4th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'04), 2004

A low-power DCT IP core based on 2D algebraic integer encoding.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Craniofacial landmarks extraction by Partial Least Squares Regression.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Electrical connectivity analysis of a MEMS micropackage.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

The Concept of a 3-D Cubic Acoustical Sensor Microarray Cluster for Use in a Hearing Instrument.
Proceedings of the 2004 International Conference on MEMS, 2004

Contrast enhancement of radiograph images based on local heterogeneity measures.
Proceedings of the 2004 International Conference on Image Processing, 2004

Design of complementary filter pairs with canonical signed-digit coefficients using genetic algorithm.
Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004

An Efficient Selected Feature Set for the Middle Age Persian Character Recognition.
Proceedings of the 33rd Applied Image Pattern Recognition Workshop (AIPR 2004), 2004

Recognition of Middle Age Persian Characters Using a Set of Invariant Moments.
Proceedings of the 33rd Applied Image Pattern Recognition Workshop (AIPR 2004), 2004

2003
A fuzzy hybrid learning algorithm for radial basis function neural network with application in human face recognition.
Pattern Recognit., 2003

An Efficient Human Face Recognition System Using Pseudo Zernike Moment Invariant and Radial Basis Function Neural Network.
Int. J. Pattern Recognit. Artif. Intell., 2003

An Efficient Feature Extraction Method with Pseudo-Zernike Moment in RBF Neural Network-Based Human Face Recognition System.
EURASIP J. Adv. Signal Process., 2003

A Feed-Forward Time-Multiplexed Neural Network with Mixed-Signal Neuron-Synapse Arrays.
Proceedings of the International Conference on VLSI, 2003

A Low-Voltage Low-Power Digital-Audio Sigma-Delta Modulator in 0.18-µm CMOS.
Proceedings of the International Conference on VLSI, 2003

Automatic Identification and Localization of Craniofacial Landmarks Using Multi Layer Neural Network.
Proceedings of the Medical Image Computing and Computer-Assisted Intervention, 2003

The Application of 2D Algebraic Integer Encoding to a DCT IP Core.
Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June, 2003

Fuzzy Associative Database for multiple planar object recognition.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A tester-on-chip implementation in 0.18µ CMOS utilizing a MEMS interface.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A new initialization technique for asynchronous circuits.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A MEMS custom micropackaging solution.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A semi-Gray encoding algorithm for low-power state assignment.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Nonlinear Effects in MEMS Capacitive Microphone Design.
Proceedings of the 2003 International Conference on MEMS, 2003

An effective feature extraction method for face recognition.
Proceedings of the 2003 International Conference on Image Processing, 2003

2002
A New Algorithm for the Elimination of Common Subexpressions in Hardware Implementation of Digital Filters by Using Genetic Programming.
J. VLSI Signal Process., 2002

Probability-based approach to rectilinear Steiner tree problems.
IEEE Trans. Very Large Scale Integr. Syst., 2002

A Number System with Continuous Valued Digits and Modulo Arithmetic.
IEEE Trans. Computers, 2002

A Neural Based Human Face Recognition System Using an Efficient Feature Extraction Method with Pseudo Zernike Moment.
J. Circuits Syst. Comput., 2002

Human Face Recognition with Different Statistical Features.
Proceedings of the Structural, 2002

A MEMS socket system for high density SoC interconnection.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

A B-s complement continuous valued digit adder.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

Multi-features and Multi-stages RBF Neural Network Classifier with Fuzzy Integral in Human Face Recognition.
Proceedings of the International Conference on Artificial Intelligence, 2002

An Efficient Method for Recognition of Human Faces Using Higher Orders Pseudo Zernike Moment Invariant.
Proceedings of the 5th IEEE International Conference on Automatic Face and Gesture Recognition (FGR 2002), 2002

2001
Unconstrained Farsi handwritten word recognition using fuzzy vector quantization and hidden Markov models.
Pattern Recognit. Lett., 2001

Handwritten Farsi (Arabic) word recognition: a holistic approach using discrete HMM.
Pattern Recognit., 2001

A VHDL-based HW/SW cosimulation of communication systems.
Comput. Electr. Eng., 2001

Design of fractional delay filters.
Comput. Electr. Eng., 2001

A novel approach based on genetic algorithm for pipelining of recursive filters.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

A MEMS implementation of an acoustical sensor array.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Fast 32-bit digital multiplier.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

An efficient 0-1 linear programming for optimal PLA folding.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

Fault Characterizations and Design-for-Testability Technique for Detecting I<sub>DDQ</sub> Faults in CMOS/BiCMOS Circuits.
Proceedings of the 38th Design Automation Conference, 2001

2000
Novel Test Generation Algorithm for Combination Circuits.
J. Circuits Syst. Comput., 2000

Design of Stable 3D Recursive Digital Filters Using 3-Variable Very Strictly Hurwitz Polynomial.
J. Circuits Syst. Comput., 2000

Holistic handwritten word recognition using discrete HMM and self-organizing feature map.
Proceedings of the IEEE International Conference on Systems, 2000

A MEMS micromagnetic actuator for use in a bionic interface.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

A Hybrid Handwritten Word Recognition Using Self-Organizing Feature Map, Discrete HMM, and Evolutionary Programming.
Proceedings of the IEEE-INNS-ENNS International Joint Conference on Neural Networks, 2000

Off-Line Unconstrained Farsi Handwritten Word Recognition Using Fuzzy Vector Quantization and Hidden Markov Word Models.
Proceedings of the 15th International Conference on Pattern Recognition, 2000

Application of Fuzzy Integrals in Fusion of Classifiers for Low Error Rate Handwritten Numerals Recognition.
Proceedings of the 15th International Conference on Pattern Recognition, 2000

1999
Enterprise Network and Systems Management.
J. Netw. Syst. Manag., 1999

Design of 1-D FIR filters with genetic algorithms.
Proceedings of the ISSPA '99. Proceedings of the Fifth International Symposium on Signal Processing and its Applications, 1999

Design of 3-D recursive digital filters using linear programming.
Proceedings of the ISSPA '99. Proceedings of the Fifth International Symposium on Signal Processing and its Applications, 1999

Arithmetic Circuits for Analog Digits.
Proceedings of the 29th IEEE International Symposium on Multiple-Valued Logic, 1999

An in-the-loop training method for VLSI neural networks.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

On-line IDDQ fault testing for CMOS/BiCMOS logic families.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

Design of 1-D FIR filters with genetic algorithms.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

A hybrid DBNS processor for DSP computation.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

Sensitivity study and improvements on a nonlinear resistive-type neuron circuit.
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999

Arithmetic with Signed Analog Digits.
Proceedings of the 14th IEEE Symposium on Computer Arithmetic (Arith-14 '99), 1999

1998
Integrating Mobility and QoS Control in Cellular Wireless ATM Networks: Modeling, Analysis and Implementation Proposal.
J. Netw. Syst. Manag., 1998

Neural Network Integrated Circuits with Single-Block Mixed Signal Arrays.
J. Circuits Syst. Comput., 1998

A Low-Variation Nonlinear Neuron Circuit.
J. Circuits Syst. Comput., 1998

Extraction of handwritten information in geometrically distorted documents.
Proceedings of the Fourteenth International Conference on Pattern Recognition, 1998

Design of stable 2-D recursive filters using power-of-two coefficients.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

A Design-for-Testability Technique for Detecting Delay Faults in Logic Circuits.
Proceedings of the 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 1998

1997
Document registration using projective geometry.
IEEE Trans. Image Process., 1997

Segmentation of handwritten interference marks using multiple directional stroke planes and reformalized morphological approach.
IEEE Trans. Image Process., 1997

A hierarchical neural network architecture for handwritten numeral recognition.
Pattern Recognit., 1997

Form Registration: A Computer Vision Approach.
Proceedings of the 4th International Conference Document Analysis and Recognition (ICDAR '97), 1997

1996
Handwritten Numeral and Machine Printed Multiple Font Character Recognition using Neural Network Classifier.
J. Circuits Syst. Comput., 1996

A modular architecture for hybrid VLSI neural networks and its application in a smart photosensor.
Proceedings of International Conference on Neural Networks (ICNN'96), 1996

Design and VLSI Implementation of a Unified Synapse-Neuron Architecture.
Proceedings of the 6th Great Lakes Symposium on VLSI (GLS-VLSI '96), 1996

1995
Recognition of handwritten numerals with multiple feature and multistage classifier.
Pattern Recognit., 1995

Design of 2-Dimensional Digital Filters Using 2-D All-Pass Building Blocks.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

Segmentation of interference marks using morphological approach.
Proceedings of the Third International Conference on Document Analysis and Recognition, 1995

Fusion of classifiers with fuzzy integrals.
Proceedings of the Third International Conference on Document Analysis and Recognition, 1995

General structure for the design of multidimensional filters with low sensitivity property.
Proceedings of the 1995 International Conference on Acoustics, 1995

1994
Segmentation of touching characters in printed document recognition.
Pattern Recognit., 1994

A Morphological Approach to Text String Extraction from Regular Periodic Overlapping Text/Background Images.
CVGIP Graph. Model. Image Process., 1994

Filters Derived from the Addtion or Subtraction of Two m-D All-Pass Filters.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

Handwritten Numeral Recognition with Multiple Features andd Multistage Classifiers.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1993
Trading nodal storage capacity with incremental transmission capacity.
IEEE Trans. Commun., 1993

Pipelined analog multi-layer feedforward neural networks.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

Character recognition using neural based feature extractor and classifier.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

1992
Pattern classification using an efficient KNNR.
Pattern Recognit., 1992

Restoration of images degraded by compound noise sources using Markov random field models.
J. Vis. Commun. Image Represent., 1992

A Large-swing High-Drive CMOS Buffer amplifier for a Wide Load Range.
J. Circuits Syst. Comput., 1992

Statistical and neural classification of handwritten numerals: a comparative study.
Proceedings of the 11th IAPR International Conference on Pattern Recognition, 1992

1991
Pattern recognition with moment invariants: A comparative study and new results.
Pattern Recognit., 1991

1990
Shape determination from intensity images-a new algorithm.
Proceedings of the 10th IAPR International Conference on Pattern Recognition, 1990

Shape contour recognition using moment invariants.
Proceedings of the 10th IAPR International Conference on Pattern Recognition, 1990

1989
A neural implementation for interpolation of stereo data.
Proceedings of the IEEE International Conference on Acoustics, 1989

1988
Restoration of degraded images using Markov random fields.
Proceedings of the IEEE International Conference on Acoustics, 1988

1987
Segmentation of noisy images modelled by Markov random fields with Gibbs distribution.
Proceedings of the IEEE International Conference on Acoustics, 1987

1985
Design of 2-D recursive digital filters with constant group delay characteristics using separable denominator transfer function and a new stability test.
IEEE Trans. Acoust. Speech Signal Process., 1985

1984
Transfer function realization of a class of doubly-terminated two-variable lossless networks and their application in linear-phase 2-dimensional digital filter design.
Proceedings of the IEEE International Conference on Acoustics, 1984

1983
A new method for the design of 2-dimensional stable recursive digital filters satisfying prescribed magnitude and group delay response.
Proceedings of the IEEE International Conference on Acoustics, 1983

Design of low sensitive 2-D analog and recursive digital filters with prescribed magnitude and group delay specifications.
Proceedings of the IEEE International Conference on Acoustics, 1983

1981
A method for the design of stable (N-D) analog and digital filters.
Proceedings of the IEEE International Conference on Acoustics, 1981


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