Maik Boden

According to our database1, Maik Boden authored at least 7 papers between 2002 and 2008.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2008
GePaRD - A High-Level Generation Flow for Partially Reconfigurable Designs.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008

2007
High-Level Synthesis of HW Tasks Targeting Run-Time Reconfigurable FPGAs.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

2006
A high-level target-precise model for designing reconfigurable HW tasks.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

2005
A Low-Cost Realization of an Adaptable Protocol Processing Unit.
Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005

2004
Cost-Efficient Implementation of Adaptive Finite State Machines.
Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004

2002
Eine wiederverwendungsgerechte Entwurfsmethodik für rekonfigurierbare SoC-Architekturen.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2002

Enhanced Reusability for SoC-Based HW/SW Co-Design.
Proceedings of the 2002 Euromicro Symposium on Digital Systems Design (DSD 2002), 2002


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