Mahta Mayahinia
Orcid: 0000-0002-6084-9810
According to our database1,
Mahta Mayahinia
authored at least 34 papers
between 2020 and 2024.
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Bibliography
2024
Dynamic Segmented Bus for Energy-Efficient Last-Level Cache in Advanced Interconnect-Dominant Nodes.
IEEE Embed. Syst. Lett., December, 2024
IEEE Des. Test, December, 2024
Hardware and Software Co-Design for Optimized Decoding Schemes and Application Mapping in NVM Compute-in-Memory Architectures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2024
IEEE Trans. Circuits Syst. I Regul. Pap., October, 2024
Design-time Reference Current Generation for Robust Spintronic-based Neuromorphic Architecture.
ACM J. Emerg. Technol. Comput. Syst., January, 2024
PhD thesis, 2024
Addressing the Combined Effect of Transistor and Interconnect Aging in SRAM towards Silicon Lifecycle Management.
Proceedings of the 42nd IEEE VLSI Test Symposium, 2024
Reliability analysis and mitigation for analog computation-in-memory: from technology to application.
Proceedings of the 42nd IEEE VLSI Test Symposium, 2024
Testing for aging in advanced SRAM: From front end of the line transistors to back end of the line interconnects.
Proceedings of the IEEE International Test Conference, 2024
Proceedings of the IEEE International Test Conference, 2024
Proceedings of the IEEE International Conference on Design, 2024
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
DropHD: Technology/Algorithm Co-Design for Reliable Energy-Efficient NVM-Based Hyper-Dimensional Computing Under Voltage Scaling.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024
2023
Timing-accurate simulation framework for NVM-based compute-in-memory architecture exploration.
it Inf. Technol., May, 2023
A Low Overhead Checksum Technique for Error Correction in Memristive Crossbar for Deep Learning Applications.
Proceedings of the 41st IEEE VLSI Test Symposium, 2023
Emerging Interconnect Exploration for SRAM Application Using Nonconventional H-Tree and Center-Pin Access.
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023
Power Side-Channel Attacks and Countermeasures on Computation-in-Memory Architectures and Technologies.
Proceedings of the IEEE European Test Symposium, 2023
Proceedings of the IEEE European Test Symposium, 2023
Electromigration-aware design technology co-optimization for SRAM in advanced technology nodes.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Special Session - Non-Volatile Memories: Challenges and Opportunities for Embedded System Architectures with Focus on Machine Learning Applications.
Proceedings of the International Conference on Compilers, 2023
2022
Time-Dependent Electromigration Modeling for Workload-Aware Design-Space Exploration in STT-MRAM.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
A Voltage-Controlled, Oscillation-Based ADC Design for Computation-in-Memory Architectures Using Emerging ReRAMs.
ACM J. Emerg. Technol. Comput. Syst., 2022
Proceedings of the 40th IEEE VLSI Test Symposium, 2022
Proceedings of the IEEE International Test Conference, 2022
An Efficient Test Strategy for Detection of Electromigration Impact in Advanced FinFET Memories.
Proceedings of the IEEE International Test Conference, 2022
Proceedings of the IEEE International Test Conference in Asia, 2022
Proceedings of the 28th IEEE International Symposium on On-Line Testing and Robust System Design, 2022
Proceedings of the IEEE European Test Symposium, 2022
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022
2021
Proceedings of the IEEE International Test Conference, 2021
2020
Efficient Organization of Digital Periphery to Support Integer Datatype for Memristor-Based CIM.
Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020