Mahesh Ravishankar

According to our database, Mahesh Ravishankar authored at least 16 papers between 2010 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

TinyIREE: An ML Execution Environment for Embedded Systems From Compilation to Deployment.

Hsin-I Cindy Liu, Marius Brehler, Mahesh Ravishankar, Nicolas Vasilache, Ben Vanik, Stella Laurenzo

IEEE Micro, 2022

Composable and Modular Code Generation in MLIR: A Structured and Retargetable Approach to Tensor Compiler Construction.

Nicolas Vasilache, Oleksandr Zinenko, Aart J. C. Bik, Mahesh Ravishankar, Thomas Raoux, Alexander Belyaev, Matthias Springer, Tobias Gysi, Diego Caballero, Stephan Herhut, Stella Laurenzo, Albert Cohen

CoRR, 2022

Structured Operations: Modular Design of Code Generators for Tensor Compilers.

Nicolas Vasilache, Oleksandr Zinenko, Aart J. C. Bik, Mahesh Ravishankar, Thomas Raoux, Alexander Belyaev, Matthias Springer, Tobias Gysi, Diego Caballero, Stephan Herhut, Stella Laurenzo, Albert Cohen

Proceedings of the Languages and Compilers for Parallel Computing, 2022

2019

Automatic acceleration of Numpy applications on GPUs and multicore CPUs.

Mahesh Ravishankar, Vinod Grover

CoRR, 2019

2018

Domain-Specific Optimization and Generation of High-Performance GPU Code for Stencil Computations.

Prashant Singh Rawat, Miheer Vaidya, Aravind Sukumaran-Rajam, Mahesh Ravishankar, Vinod Grover, Atanas Rountev, Louis-Noël Pouchet, P. Sadayappan

Proc. IEEE, 2018

Diesel: DSL for linear algebra and neural net computations on GPUs.

Venmugil Elango, Norm Rubin, Mahesh Ravishankar, Hariharan Sandanagobalane, Vinod Grover

Proceedings of the 2nd ACM SIGPLAN International Workshop on Machine Learning and Programming Languages, 2018

2016

Effective resource management for enhancing performance of 2D and 3D stencils on GPUs.

Prashant Singh Rawat, Changwan Hong, Mahesh Ravishankar, Vinod Grover, Louis-Noël Pouchet, P. Sadayappan

Proceedings of the 9th Annual Workshop on General Purpose Processing using Graphics Processing Unit, 2016

Resource Conscious Reuse-Driven Tiling for GPUs.

Prashant Singh Rawat, Changwan Hong, Mahesh Ravishankar, Vinod Grover, Louis-Noël Pouchet, Atanas Rountev, P. Sadayappan

Proceedings of the 2016 International Conference on Parallel Architectures and Compilation, 2016

2015

Forma: a DSL for image processing applications to target GPUs and multi-core CPUs.

Mahesh Ravishankar, Justin Holewinski, Vinod Grover

Proceedings of the 8th Workshop on General Purpose Processing using GPUs, 2015

Distributed memory code generation for mixed Irregular/Regular computations.

Mahesh Ravishankar, Roshan Dathathri, Venmugil Elango, Louis-Noël Pouchet, J. Ramanujam, Atanas Rountev, P. Sadayappan

Proceedings of the 20th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2015

Fusing convolution kernels through tiling.

Mahesh Ravishankar, Paulius Micikevicius, Vinod Grover

Proceedings of the 2nd ACM SIGPLAN International Workshop on Libraries, 2015

2014

Automatic parallelization of a class of irregular loops for distributed memory systems.

Mahesh Ravishankar, John Eisenlohr, Louis-Noël Pouchet, J. Ramanujam, Atanas Rountev, P. Sadayappan

ACM Trans. Parallel Comput., 2014

2013

Beyond reuse distance analysis: Dynamic analysis for characterization of data locality potential.

Naznin Fauzia, Venmugil Elango, Mahesh Ravishankar, J. Ramanujam, Fabrice Rastello, Atanas Rountev, Louis-Noël Pouchet, P. Sadayappan

ACM Trans. Archit. Code Optim., 2013

2012

Code generation for parallel execution of a class of irregular loops on distributed memory systems.

Mahesh Ravishankar, John Eisenlohr, Louis-Noël Pouchet, J. Ramanujam, Atanas Rountev, P. Sadayappan

Proceedings of the SC Conference on High Performance Computing Networking, 2012

Dynamic trace-based analysis of vectorization potential of applications.

Justin Holewinski, Ragavendar Ramamurthi, Mahesh Ravishankar, Naznin Fauzia, Louis-Noël Pouchet, Atanas Rountev, P. Sadayappan

Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation, 2012

2010

Optimal loop unrolling for GPGPU programs.

Giridhar Sreenivasa Murthy, Mahesh Ravishankar, Muthu Manikandan Baskaran, Ponnuswamy Sadayappan

Proceedings of the 24th IEEE International Symposium on Parallel and Distributed Processing, 2010