Mahdi Nazm Bojnordi
Orcid: 0000-0002-1496-5650
According to our database1,
Mahdi Nazm Bojnordi
authored at least 41 papers
between 2006 and 2023.
Collaborative distances:
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On csauthors.net:
Bibliography
2023
IEEE Trans. Computers, February, 2023
IEEE Micro, 2023
2022
IEEE Trans. Computers, 2022
2021
FORMS: Fine-grained Polarized ReRAM-based In-situ Computation for Mixed-signal DNN Accelerator.
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021
Proceedings of the IEEE International Conference on Acoustics, 2021
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021
TinyADC: Peripheral Circuit-aware Weight Pruning Framework for Mixed-signal DNN Accelerators.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
2020
IEEE Trans. Computers, 2020
IEEE Trans. Computers, 2020
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
2019
Content Aware Refresh: Exploiting the Asymmetry of DRAM Retention Errors to Reduce the Refresh Frequency of Less Vulnerable Data.
IEEE Trans. Computers, 2019
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
2018
IEEE Trans. Very Large Scale Integr. Syst., 2018
Sanitizer: Mitigating the Impact of Expensive ECC Checks on STT-MRAM Based Main Memories.
IEEE Trans. Computers, 2018
Proceedings of the International Symposium on Low Power Electronics and Design, 2018
Proceedings of the 36th IEEE International Conference on Computer Design, 2018
2017
Proceedings of the 5th International Workshop on Energy Efficient Supercomputing, 2017
Proceedings of the 26th International Conference on Parallel Architectures and Compilation Techniques, 2017
2016
IEEE Trans. Very Large Scale Integr. Syst., 2016
Memristive Boltzmann machine: A hardware accelerator for combinatorial optimization and deep learning.
Proceedings of the 2016 IEEE International Symposium on High Performance Computer Architecture, 2016
2015
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015
Architecting a MOS current mode logic (MCML) processor for fast, low noise and energy-efficient computing in the near-threshold regime.
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015
2013
ACM Trans. Comput. Syst., 2013
Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture, 2013
2012
Proceedings of the 39th International Symposium on Computer Architecture (ISCA 2012), 2012
2008
Proceedings of the Advances in Computer Science and Engineering, 2008
2007
Proceedings of the 15th International Symposium on Modeling, 2007
Proceedings of the 14th IEEE International Conference on Electronics, 2007
2006
An Efficient Deblocking Filter with Self-Transposing Memory Architecture For H.264/AVC.
Proceedings of the 2006 IEEE International Conference on Acoustics Speech and Signal Processing, 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Proceedings of the Canadian Conference on Electrical and Computer Engineering, 2006
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006