Mahdi M. Khafaji
Orcid: 0000-0003-0044-3074
According to our database1,
Mahdi M. Khafaji
authored at least 24 papers
between 2007 and 2022.
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Bibliography
2022
A Low-Distortion Modulator Driver With Over 6.5-V<sub>pp</sub> Differential Output Swing and Bandwidth Above 60 GHz in a 130-nm SiGe BiCMOS Technology.
IEEE Access, 2022
2020
A 0.2-1.3 ns Range Delay-Control Scheme for a 25 Gb/s Data-Receiver Using a Replica Delay-Line-Based Delay-Locked-Loop in 45-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2020
2019
A 10-Gb/s 20-ps Delay-Range Digitally Controlled Differential Delay Element in 45-nm SOI CMOS.
IEEE Trans. Very Large Scale Integr. Syst., 2019
A 1-pJ/bit 80-Gb/s $2^{15}-1$ PRBS Generator With a Modified Cherry-Hooper Output Driver.
IEEE J. Solid State Circuits, 2019
A 90 μW, 2.5 GHz high linearity programmable delay cell for signal duty-cycle adjustment.
Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019
Proceedings of the 15th Conference on Ph.D. Research in Microelectronics and Electronics, 2019
A 0.93 pJ/bit Controlled Capacitor-Charge 2-bit Pulsewidth Demodulator in 45-nm RFSOI CMOS.
Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019
A 2.8 pJ/bit 10 Gb/s Delayed-Phase-Select 2-bit Pulsewidth Modulator in 45-nm SOI CMOS.
Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
2018
A 25-Gb/s 270-mW Time-to-Digital Converter-Based 8× Oversampling Input-Delayed Data-Receiver in 45-nm SOI CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
A 16 mW 250 ps Double-Hit-Resolution Input-Sampled Time-to-Digital Converter in 45-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2018
A 4×45 Gb/s Two-Tap FFE VCSEL Driver in 14-nm FinFET CMOS Suitable for Burst Mode Operation.
IEEE J. Solid State Circuits, 2018
Comparison of Segmented and Traveling-Wave Electro-Optical Transmitters Based on Silicon Photonics Mach-Zehnder Modulators.
Proceedings of the Photonics in Switching and Computing, 2018
Proceedings of the Optical Fiber Communications Conference and Exposition, 2018
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018
Analysis of a Modified Current Switching Cell for High-Speed Digital-to-Analog Converters.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
A 1-60 GHz 9.6 mW 0.18 V Output-Swing Static Clock Divider Circuit in 45-nm SOI CMOS.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018
2017
IEEE J. Solid State Circuits, 2017
Opto-electrical analog front-end with rapid power-on and 0.82 pJ/bit for 28 Gb/s in 14 nm FinFET CMOS.
Proceedings of the 30th IEEE International System-on-Chip Conference, 2017
Adaptive high-speed and ultra-low power optical interconnect for data center communications.
Proceedings of the 2017 19th International Conference on Transparent Optical Networks (ICTON), 2017
2016
IEEE Trans. Circuits Syst. II Express Briefs, 2016
2014
A 32 GSps multiplexer with 1 kbit memory for arbitrary signal generation for testing digital-to-analogue converters.
IET Circuits Devices Syst., 2014
2012
Twelve-bit 20-GHz reduced size pipeline accumulator in 0.25 μm SiGe: C technology for direct digital synthesiser applications.
IET Circuits Devices Syst., 2012
2007
IEICE Electron. Express, 2007