Mahanama Wickramasinghe
Orcid: 0000-0003-0899-2705
According to our database1,
Mahanama Wickramasinghe
authored at least 5 papers
between 2014 and 2023.
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Bibliography
2023
RV32IMF Five-Stage Pipeline Implementation with Interrupt and Random Number Generation Units.
Proceedings of the 17th IEEE International Conference on Industrial and Information Systems, 2023
2016
Thread level parallel processing for high performance and energy efficiency in application specific embedded systems.
PhD thesis, 2016
Data-Space Relocation to Improve Data Cache Performance for Embedded Multi-threaded Processor Systems.
Proceedings of the Fifth International Conference on Network, Communication and Computing, 2016
2015
Effective hardware-level thread synchronization for high performance and power efficiency in application specific multi-threaded embedded processors.
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015
2014
Energy-Aware Thread Scheduling for Embedded Multi-threaded Processors: Architectural Level Design and Implementation.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014