Madhava Sarma Vemuri

Orcid: 0000-0002-8883-7790

According to our database1, Madhava Sarma Vemuri authored at least 12 papers between 2020 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2024
Modeling and Design of Dual-Purpose MIV in Monolithic 3D IC.
IEEE Access, 2024

Design Approaches and Consideration for a Reliable and Efficient Monolithic 3D Integration.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024

Compact 6T-SRAM Using Bottom-Gate Transistor in FD-SOI Process for Monolithic-3D Integration.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024

2023
Design, Analysis and Optimization of Magnetic-Core Solenoid Inductor for On-Chip Multi-Phase Buck Converter.
IEEE Access, 2023

FDSOI Process Based MIV-transistor Utilization for Standard Cell Designs in Monolithic 3D Integration.
Proceedings of the 36th IEEE International System-on-Chip Conference, 2023

Efficient and Scalable MIV-Transistor with Extended Gate in Monolithic 3D Integration.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

Metal Inter-layer Via Keep-out-zone in M3D IC: A Critical Process-aware Design Consideration.
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

Small Footprint 6T-SRAM Design with MIV-Transistor Utilization in M3D-IC Technology.
Proceedings of the 41st IEEE International Conference on Computer Design, 2023

2020
An Improved Quadrature Voltage-Controlled Oscillator with Through-Silicon-Via Inductor in Three-dimensional Integrated Circuits.
CoRR, 2020

Efficient Metal Inter-Layer Via Utilization Strategies for Three-dimensional Integrated Circuits.
Proceedings of the 33rd IEEE International System-on-Chip Conference, 2020

Design and Optimization of Magnetic-core Solenoid Inductor for Multi-phase Buck Converter.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

Dual-Purpose Metal Inter-layer Via Utilization in Monolithic Three-Dimensional (M3D) Integration.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020


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