Maciej Kopczynski

According to our database, Maciej Kopczynski authored at least 19 papers between 2013 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

World Maps Conversions for 3D Mobile Games Working in Real-Time Environment.

Maciej Kopczynski

Proceedings of the Harnessing Opportunities: Reshaping ISD in the post-COVID-19 and Generative AI Era (ISD2024 Proceedings), 2024

Usage of Real-World Maps for 3D Mobile Games - Transformations and Optimizations.

Maciej Kopczynski

Proceedings of the Computer Information Systems and Industrial Management, 2024

2022

FPGA supported rough set reduct calculation for big datasets.

Maciej Kopczynski, Tomasz Grzes

J. Intell. Inf. Syst., 2022

Mobile Phone as a 6DoF Motion Controller.

Maciej Kopczynski

Proceedings of the Computer Information Systems and Industrial Management, 2022

2021

Hardware Rough Set Processor Parallel Architecture in FPGA for Finding Core in Big Datasets.

Maciej Kopczynski, Tomasz Grzes

J. Artif. Intell. Soft Comput. Res., 2021

FPGA in Core Calculation for Big Datasets.

Maciej Kopczynski

Proceedings of the Computer Information Systems and Industrial Management, 2021

Development of Digital Competences of Elementary School Teachers with a Life-Long Learning Approach.

Michal Czolombitko, Tomasz Grzes, Maciej Kopczynski, Urszula Kuzelewska, Anna Lupinska-Dubicka, Dorota Mozyrska, Joanna Panasiuk

Proceedings of the Computer Information Systems and Industrial Management, 2021

2020

Parallelized Hardware Rough Set Processor Architecture in FPGA for Core Calculation in Big Datasets.

Maciej Kopczynski, Tomasz Grzes

Proceedings of the 16th International Conference on Control, 2020

2019

Hardware Implementation on Field Programmable Gate Array of Two-Stage Algorithm for Rough Set Reduct Generation.

Tomasz Grzes, Maciej Kopczynski

Proceedings of the Rough Sets - International Joint Conference, 2019

2017

Hardware Supported Rule-Based Classification on Big Datasets.

Maciej Kopczynski, Tomasz Grzes, Jaroslaw Stepaniuk

Proceedings of the Rough Sets - International Joint Conference, 2017

2016

Rough Sets Based LEM2 Rules Generation Supported by FPGA.

Maciej Kopczynski, Tomasz Grzes, Jaroslaw Stepaniuk

Fundam. Informaticae, 2016

Core for Large Datasets: Rough Sets on FPGA.

Maciej Kopczynski, Tomasz Grzes, Jaroslaw Stepaniuk

Fundam. Informaticae, 2016

Hardware Supported Rough Sets Based Rules Generation for Big Datasets.

Maciej Kopczynski, Tomasz Grzes, Jaroslaw Stepaniuk

Proceedings of the Computer Information Systems and Industrial Management, 2016

2015

Computation of Cores in Big Datasets: An FPGA Approach.

Maciej Kopczynski, Tomasz Grzes, Jaroslaw Stepaniuk

Proceedings of the Rough Sets and Knowledge Technology - 10th International Conference, 2015

2014

FPGA in Rough-Granular Computing: Reduct Generation.

Maciej Kopczynski, Tomasz Grzes, Jaroslaw Stepaniuk

Proceedings of the 2014 IEEE/WIC/ACM International Joint Conferences on Web Intelligence (WI) and Intelligent Agent Technologies (IAT), Warsaw, Poland, August 11-14, 2014, 2014

Generating Core in Rough Set Theory: Design and Implementation on FPGA.

Maciej Kopczynski, Tomasz Grzes, Jaroslaw Stepaniuk

Proceedings of the Rough Sets and Intelligent Systems Paradigms, 2014

2013

Hardware Implementations of Rough Set Methods in Programmable Logic Devices.

Maciej Kopczynski, Jaroslaw Stepaniuk

Proceedings of the Rough Sets and Intelligent Systems - Professor Zdzisław Pawlak in Memoriam, 2013

The First Step Toward Processor for Rough Set Methods.

Jaroslaw Stepaniuk, Maciej Kopczynski, Tomasz Grzes

Fundam. Informaticae, 2013

FPGA in Rough Set Based Core and Reduct Computation.

Tomasz Grzes, Maciej Kopczynski, Jaroslaw Stepaniuk

Proceedings of the Rough Sets and Knowledge Technology - 8th International Conference, 2013