Maciej Bellos
According to our database1,
Maciej Bellos
authored at least 13 papers
between 1999 and 2006.
Collaborative distances:
Collaborative distances:
Timeline
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Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2006
A core generator for arithmetic cores and testing structures with a network interface.
J. Syst. Archit., 2006
2005
PhD thesis, 2005
Proceedings of the Dependable Computing, 2005
2004
Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004
Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004
Proceedings of the 5th International Symposium on Quality of Electronic Design (ISQED 2004), 2004
2003
DV-TSE: Difference Vector Based Test Set Embedding.
Proceedings of the IFIP VLSI-SoC 2003, 2003
Proceedings of the 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), 2003
2002
Proceedings of the Dependable Computing, 2002
2001
A Formal Test Set for RNS Adders and an Efficient Low Power BIST Scheme.
Proceedings of the 2nd Latin American Test Workshop, 2001
1999
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999
Path Delay Fault Testing of a Class of Circuit-Switched Multistage Interconnection Networks.
Proceedings of the Dependable Computing, 1999