Macarena C. Martínez-Rodríguez
Orcid: 0000-0003-3025-5736
According to our database1,
Macarena C. Martínez-Rodríguez
authored at least 30 papers
between 2011 and 2024.
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Bibliography
2024
Hardware-Efficient Configurable Ring-Oscillator-Based Physical Unclonable Function/True Random Number Generator Module for Secure Key Management.
Sensors, September, 2024
Proceedings of the 2024 IEEE Nordic Circuits and Systems Conference (NorCAS), 2024
Design of a Karatsuba Multiplier to Accelerate Digital Signature Schemes on Embedded Systems.
Proceedings of the 2024 IEEE Nordic Circuits and Systems Conference (NorCAS), 2024
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2024
2023
Timing-Attack-Resistant Acceleration of NTRU Round 3 Encryption on Resource-Constrained Embedded Systems.
Cryptogr., June, 2023
On-Line Evaluation and Monitoring of Security Features of an RO-Based PUF/TRNG for IoT Devices.
Sensors, 2023
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2023
Proceedings of the 38th Conference on Design of Circuits and Integrated Systems, 2023
A Simple Power Analysis of an FPGA implementation of a polynomial multiplier for the NTRU cryptosystem.
Proceedings of the 38th Conference on Design of Circuits and Integrated Systems, 2023
2022
Multi-Unit Serial Polynomial Multiplier to Accelerate NTRU-Based Cryptographic Schemes in IoT Embedded Systems.
Sensors, 2022
Efficient RO-PUF for Generation of Identifiers and Keys in Resource-Constrained Embedded Systems.
Cryptogr., 2022
Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022
2021
Timing-Optimized Hardware Implementation to Accelerate Polynomial Multiplication in the NTRU Algorithm.
ACM J. Emerg. Technol. Comput. Syst., 2021
Proceedings of the XXXVI Conference on Design of Circuits and Integrated Systems, 2021
Proceedings of the Cryptology and Network Security - 20th International Conference, 2021
2020
Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020
2018
Microprocess. Microsystems, 2018
2017
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2017
2016
Application specific integrated circuit solution for multi-input multi-output piecewise-affine functions.
Int. J. Circuit Theory Appl., 2016
2015
Digital VLSI Implementation of Piecewise-Affine Controllers Based on Lattice Approach.
IEEE Trans. Control. Syst. Technol., 2015
Proceedings of the International Symposium on Consumer Electronics, 2015
Proceedings of the IEEE International Conference on Industrial Technology, 2015
2014
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014
2013
A Programmable and Configurable ASIC to Generate Piecewise-Affine Functions Defined Over General Partitions.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013
2012
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012
Reducing bit flipping problems in SRAM physical unclonable functions for chip identification.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012
2011
Proceedings of the 2011 International Conference on Field-Programmable Technology, 2011
Circuit implementation of piecewise-affine functions based on lattice representation.
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011