M. Yerena-Mora

Orcid: 0000-0001-7387-484X

According to our database1, M. Yerena-Mora authored at least 1 paper in 2019.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2019
Design of a phase alignment circuit for lock in amplifiers in 1.8V-0.18μm CMOS technology.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019


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