M. Sazadur Rahman

Orcid: 0000-0002-1045-9785

According to our database1, M. Sazadur Rahman authored at least 17 papers between 2019 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
DOSCrack: Deobfuscation Using Oracle-Guided Symbolic Execution and Clustering of Binary Security Keys.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2024

SeeMLess: Security Evaluation of Logic Locking using Machine Learning oriented Estimation.
Proceedings of the Great Lakes Symposium on VLSI 2024, 2024

2023
iPROBE: Internal Shielding Approach for Protecting Against Front-Side and Back-Side Probing Attacks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2023

ReTrustFSM: Toward RTL Hardware Obfuscation-A Hybrid FSM Approach.
IEEE Access, 2023

CAPEC: A Cellular Automata Guided FSM-based IP Authentication Scheme.
Proceedings of the 41st IEEE VLSI Test Symposium, 2023

Metrics-to-Methods: Decisive Reverse Engineering Metrics for Resilient Logic Locking.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

PSC-Watermark: Power Side Channel Based IP Watermarking Using Clock Gates.
Proceedings of the IEEE European Test Symposium, 2023

EvoLUTe: Evaluation of Look-Up-Table-based Fine-Grained IP Redaction.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

ActiWate: Adaptive and Design-agnostic Active Watermarking for IP Ownership in Modern SoCs.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022
Rethinking Watermark: Providing Proof of IP Ownership in Modern SoCs.
IACR Cryptol. ePrint Arch., 2022

RTL-FSMx: Fast and Accurate Finite State Machine Extraction at the RTL for Security Applications.
Proceedings of the IEEE International Test Conference, 2022

O'clock: lock the clock via clock-gating for SoC IP protection.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021
Security Assessment of Dynamically Obfuscated Scan Chain Against Oracle-guided Attacks.
ACM Trans. Design Autom. Electr. Syst., 2021

LL-ATPG: Logic-Locking Aware Test Using Valet Keys in an Untrusted Environment.
Proceedings of the IEEE International Test Conference, 2021

2020
Defense-in-depth: A recipe for logic locking to prevail.
Integr., 2020

The Key is Left under the Mat: On the Inappropriate Security Assumption of Logic Locking Schemes.
Proceedings of the 2020 IEEE International Symposium on Hardware Oriented Security and Trust, 2020

2019
Dynamically Obfuscated Scan Chain To Resist Oracle-Guided Attacks On Logic Locked Design.
IACR Cryptol. ePrint Arch., 2019


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