M. Rahimi
According to our database1,
M. Rahimi
authored at least 4 papers
between 2019 and 2022.
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Bibliography
2022
A novel generic modulo-2 graph with full set taxonomical conversion to parallel prefix adders.
Int. J. Circuit Theory Appl., 2022
2021
A fanout-improved Parallel Prefix Adder with full-swing PTL cells and Graded Bit Efficiency.
Microelectron. J., 2021
2020
Proceedings of the 2020 IEEE Symposium Series on Computational Intelligence, 2020
2019
A low-power and high-speed parallel binary comparator based on inter-stage modified binary tree structure and power-delay improved cell elements.
Microelectron. J., 2019