M. Pilar Garde
Orcid: 0000-0002-3228-7873
According to our database1,
M. Pilar Garde
authored at least 11 papers
between 2017 and 2021.
Collaborative distances:
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Bibliography
2021
Proceedings of the XXXVI Conference on Design of Circuits and Integrated Systems, 2021
2020
Power Efficient Simple Technique to Convert a Reset-and-Hold Into a True-Sample-and-Hold Using an Auxiliary Output Stage.
IEEE Access, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
Int. J. Circuit Theory Appl., 2019
2018
IEEE Trans. Circuits Syst. II Express Briefs, 2018
Ultra-Low Power Subthreshold Quasi Floating Gate CMOS Logic Family for Energy Harvesting.
Proceedings of the 28th International Symposium on Power and Timing Modeling, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2017
Proceedings of the 2017 European Conference on Circuit Theory and Design, 2017